參數(shù)資料
型號: ATTINY44A-SSUR
廠商: Atmel
文件頁數(shù): 15/135頁
文件大?。?/td> 0K
描述: MCU AVR 4KB FLASH 20MHZ 14SOIC
產(chǎn)品培訓(xùn)模塊: MCU Product Line Introduction
tinyAVR Introduction
標(biāo)準(zhǔn)包裝: 1
系列: AVR® ATtiny
核心處理器: AVR
芯體尺寸: 8-位
速度: 20MHz
連通性: USI
外圍設(shè)備: 欠壓檢測/復(fù)位,POR,PWM,溫度傳感器,WDT
輸入/輸出數(shù): 12
程序存儲器容量: 4KB(2K x 16)
程序存儲器類型: 閃存
EEPROM 大小: 256 x 8
RAM 容量: 256 x 8
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 14-SOIC(0.154",3.90mm 寬)
包裝: 標(biāo)準(zhǔn)包裝
其它名稱: ATTINY44A-SSURDKR
111
32015G–AVR32–09/09
AT32AP7001
11.6.5
Interrupt Enable/Disable/Mask/Status/Clear
Name:
IER/IDR/IMR/ISR/ICR
Access Type:
IER/IDR/ICR: Write-only
IMR/ISR: Read-only
MSKRDY: Mask Ready
0: Either xxxMASK register has been written, and clocks are not yet enabled or disabled according to the new mask value.
1: Clocks are enabled and disabled as indicated in the xxxMASK registers.
Note: Writing ICR:MSKRDY to 1 has no effect.
CKRDY: Clock Ready
0: The CKSEL register has been written, and the new clock setting is not yet effective.
1: The synchronous clocks have frequencies as indicated in the CKSEL register.
Note: Writing ICR:CKRDY to 1 has no effect.
VMRDY, VOK
These bits are for internal use only. In ISR, the value of these bits is undefined. In IER, these bits should be written to 0.
WAKE: Wake Pin Asserted
0: The WAKE_N pin is not asserted, or has been asserted for less than one PB clock period.
1: The WAKE_N pin is asserted for longer than one PB clock period.
LOCK1: PLL1 locked
LOCK0: PLL0 locked
0: The PLL is unlocked, and cannot be used as clock source.
1: The PLL is locked, and can be used as clock source.
The effect of writing or reading the bits listed above depends on which register is being accessed:
IER (Write-only)
0: No effect
1: Enable Interrupt
IDR (Write-only)
0: No effect
1: Disable Interrupt
31
30
29
28
27
26
25
24
-
---
--
23
22
21
20
19
18
17
16
-
---
--
15
14
13
12
11
10
9
8
-
---
--
76
543
21
0
-
MSKRDY
CKRDY
VMRDY
VOK
WAKE
LOCK1
LOCK0
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