12
Lucent Technologies Inc.
Data Sheet
February 2001
L7583A/B/C/D Line Card Access Switch
Protection
Integrated SLIC Protection
Diode Bridge/SCR
In the L7583Axx and the L7583Cxx versions, protection to
the SLIC device or other subsequent circuitry is provided by
a combination of current-limited break switches, a diode
bridge/SCR clamping circuit, and a thermal shutdown mech-
anism. In the L7583Bxx and the L7583Dxx versions, protec-
tion to the SLIC device or other subsequent circuitry is
provided by a combination of current-limited break
switches, a diode bridge, and a thermal shutdown mecha-
nism.
In both protection versions, during a positive lightning event,
fault current is directed to ground via steering diodes in the
diode bridge. Voltage is clamped to a diode drop above
ground. In the A version, negative lightning causes the SCR
to conduct when the voltage goes 2 V to 4 V more negative
than the battery. Fault currents are then directed to ground
via the SCR and steering diodes in the diode bridge.
Note that for the SCR to foldback or crowbar, the ON volt-
age (see
Table 14) of the SCR must be less negative than the
battery reference voltage. If the battery voltage is less nega-
tive than the SCR ON voltage, the SCR will conduct fault
currents to ground; however, it will not crowbar.
In the B/D version, negative lightning is directed to battery
via steering diodes in the diode bridge.
For power cross and power induction faults, in both protec-
tion versions, the positive cycle of the fault is clamped a
diode drop above ground and fault currents steered to
ground. In the A/C version, the negative cycle will cause the
SCR to trigger when the voltage exceeds the battery refer-
ence voltage by 2 V to 4 V. When the SCR triggers, fault cur-
rent is steered to ground. In the B/D version, the negative
cycle of the power cross is steered to battery.
Current Limiting
During a lightning event, the current that is passed through
the break switches and presented to the integrated protection
circuit and subsequent circuitry is limited by the dynamic
current-limit response of the break switches (assuming idle/
talk state). When the voltage seen at the TLINE/RLINE nodes is
properly clamped by an external secondary protector, upon
application of a 1000 V, 10 x 1000 pulse (LSSGR lightning),
the current seen at the TBAT/RBAT nodes will typically be a
pulse of magnitude 2.5 A and duration less than 0.5 s.
During a power cross event, the current that is passed
through the break switches and presented to the integrated
protection circuit and subsequent circuitry is limited by the
dc current-limit response of the break switches (assuming
idle/talk state). The dc current limit is specified over temper-
ature between 100 mA and
250 mA. Note that the current-limit circuitry has a negative
temperature coefficient. Thus, if the device is subjected to an
extended power cross, the value of current seen at TBAT/RBAT
will decrease as the device heats due to the fault current. If
sufficient heating occurs, the temperature shutdown mecha-
nism will activate and the device will enter an all off mode.
Temperature Shutdown Mechanism
When the device temperature reaches a minimum of 110 °C,
the thermal shutdown mechanism will activate and force the
device into an all OFF state, regardless of the logic input
pins. Pin TSD, when used as an output, will read 0 V when
the device is in the thermal shutdown mode and +VDD during
normal operation.
During a lightning event, due to the relatively short duration,
the thermal shutdown will not typically activate.
During an extended power cross, the device temperature will
rise and cause the device to enter the thermal shutdown
mode. This forces an all off mode, and the current seen at
TBAT/RBAT drops to zero. Once in the thermal shutdown
mode, the device will cool and exit the thermal shutdown
mode, thus reentering the state it was in prior to thermal
shutdown. Current, limited to the dc current-limit value, will
again begin to flow and device heating will begin again. This
cycle of entering and exiting thermal shutdown will last as
long as the power cross fault is present. The frequency of
entering and exiting thermal shutdown will depend on the
magnitude of the power cross. If the magnitude of the power
cross is great enough, the external secondary protector may
trigger shunting all current to ground.
In the L7583, the thermal shutdown mechanism can be dis-
abled by forcing the TSD pin to +VDD. This functionality is
different from the L7581, whose thermal shutdown mecha-
nism cannot be disabled.
Electrical specifications relating to the integrated overvolt-
age clamping circuit are outlined in
Table 15.