參數(shù)資料
型號： AV80C51C-36D
廠商： ATMEL CORP
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 36 MHz, MICROCONTROLLER, PQFP44
封裝： 1.40 MM HEIGHT, QFP-44
文件頁數(shù)： 5/170頁
文件大?。?/td> 4133K
代理商： AV80C51C-36D
102
ATtiny4/5/9/10 [DATASHEET]
8127F–AVR–02/2013
14.5.4
SIN - Serial IN from i/o space using direct addressing
The SIN instruction loads data byte from the I/O space to the shift register of the physical layer for serial read-out.
The instuction uses direct addressing, the address consisting of the 6 address bits of the instruction, as shown in
14.5.5
SOUT - Serial OUT to i/o space using direct addressing
The SOUT instruction stores the data byte that is shifted into the physical layer shift register to the I/O space. The
instruction uses direct addressing, the address consisting of the 6 address bits of the instruction, as shown in Table
14.5.6
SLDCS - Serial LoaD data from Control and Status space using direct addressing
The SLDCS instruction loads data byte from the TPI Control and Status Space to the TPI physical layer shift regis-
ter for serial read-out. The SLDCS instruction uses direct addressing, the direct address consisting of the 4
address bits of the instruction, as shown in Table 14-7.
14.5.7
SSTCS - Serial STore data to Control and Status space using direct addressing
The SSTCS instruction stores the data byte that is shifted into the TPI physical layer shift register to the TPI Control
and Status Space. The SSTCS instruction uses direct addressing, the direct address consisting of the 4 address
bits of the instruction, as shown in Table 14-8.
Table 14-5.
The Serial IN from i/o space (SIN) Instruction
Operation
Opcode
Remarks
data
I/O[a]
0aa1 aaaa
Bits marked ‘a(chǎn)’ form the direct, 6-bit addres
Table 14-6.
The Serial OUT to i/o space (SOUT) Instruction
Operation
Opcode
Remarks
I/O[a]
data
1aa1 aaaa
Bits marked ‘a(chǎn)’ form the direct, 6-bit addres
Table 14-7.
The Serial Load Data from Control and Status space (SLDCS) Instruction
Operation
Opcode
Remarks
data
CSS[a]
1000 aaaa
Bits marked ‘a(chǎn)’ form the direct, 4-bit addres
Table 14-8.
The Serial STore data to Control and Status space (SSTCS) Instruction
Operation
Opcode
Remarks
CSS[a]
data
1100 aaaa
Bits marked ‘a(chǎn)’ form the direct, 4-bit addres
相關(guān)PDF資料
PDF描述
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