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參數(shù)資料
| 型號： | BCM5802 |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | SPECIALTY MICROPROCESSOR CIRCUIT, PQFP144 |
| 封裝： | 28 X 28 MM, QFP-144 |
| 文件頁數(shù)： | 7/41頁 |
| 文件大小： | 571K |
| 代理商： | BCM5802 |
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Altera Corporation
15
MAX 9000 Programmable Logic Device Family Data Sheet
A row interconnect channel can be fed by the output of the macrocell
through a 4-to-1 multiplexer that the macrocell shares with three column
channels. If the multiplexer is used for a macrocell-to-row connection, the
three column signals can access another row channel via an additional
3-to-1 multiplexer. Within any LAB, the multiplexers provide all
48 column channels with access to 32 row channels.
Row-to-I/O Cell Connections
Figure 8 illustrates the connections between row interconnect channels
and IOCs. An input signal from an IOC can drive two separate row
channels. When an IOC is used as an output, the signal is driven by a
10-to-1 multiplexer that selects the row channels. Each end of the row
channel feeds up to eight IOCs on the periphery of the device.
Figure 8. MAX 9000 Row-to-IOC Connections
Column-to-I/O Cell Connections
Each end of a column channel has up to 10 IOCs (see Figure 9). An input
signal from an IOC can drive two separate column channels. When an
IOC is used as an output, the signal is driven by a 17-to-1 multiplexer that
selects the column channels.
96
Each IOC is driven by
a 10-to-1 multiplexer.
Each IOC can drive up to
two row channels.
IOC8
IOC1
10
Row FastTrack
Interconnect
96
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