參數(shù)資料
型號(hào): BQ20Z80DBT-V101
廠商: TEXAS INSTRUMENTS INC
元件分類: 電源管理
英文描述: 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO38
封裝: GREEN, PLASTIC, TSSOP-38
文件頁(yè)數(shù): 56/73頁(yè)
文件大?。?/td> 1094K
代理商: BQ20Z80DBT-V101
www.ti.com
SMBus TIMING SPECIFICATIONS
bq20z80-V101
SLUS625D – SEPTEMBER 2004 – REVISED OCTOBER 2005
V
DD = 3 V to 3.6 V, TA = –40°C to 85°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
fSMB
SMBus operating frequency
Slave mode, SMBC 50% duty cycle
10
100
kHz
fMAS
SMBus master clock frequency
Master mode, no clock low slave extend
51.2
tBUF
Bus free time between start and stop
4.7
tHD:STA
Hold time after (repeated) start
4
s
tSU:STA
Repeated start setup time
4.7
tSU:STO
Stop setup time
4
Receive mode
0
tHD:DAT
Data hold time
Transmit mode
300
ns
tSU:DAT
Data setup time
250
tTIMEOUT
Error signal/detect
(1)25
35
ms
tLOW
Clock low period
4.7
s
tHIGH
Clock high period
(2)4
50
tLOW:SEXT
Cumulative clock low slave extend time
(3)25
ms
tLOW:MEXT
Cumulative clock low master extend time
(4)10
tF
Clock/data fall time
(VILMAX– 0.15 V) to (VIHMIN + 0.15 V)
300
ns
tR
Clock/data rise time
0.9 VDD to (VILMAX – 0.15 V)
1000
(1)
The bq20z80 times out when any clock low exceeds tTIMEOUT.
(2)
tHIGH:MAX. is minimum bus idle time. SMBC = 1 for t > 50 s causes reset of any transaction involving the bq20z80 that is in progress.
(3)
tLOW:SEXT is the cumulative time a slave device is allowed to extend the clock cycles in one message from initial start to the stop.
(4)
tLOW:MEXT is the cumulative time a master device is allowed to extend the clock cycles in one message from initial start to the stop.
SMBus TIMING DIAGRAM
6
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