參數(shù)資料
型號： BT16373BDL
廠商： NXP SEMICONDUCTORS
元件分類： 通用總線功能
英文描述： 16-bit transparent latch 3-State
中文描述： ABT SERIES, DUAL 8-BIT DRIVER, TRUE OUTPUT, PDSO48
封裝： 7.50 MM, PLASTIC, SOT-370-1, SSOP-48
文件頁數(shù)： 5/10頁
文件大小： 86K
代理商： BT16373BDL
Philips Semiconductors
Product specification
74ABT16373B
74ABTH16373B
16-bit transparent latch (3-State)
1998 Feb 27
5
DC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
T
amb
= +25
°
C
T
amb
= –40
°
C
°
C
UNIT
MIN
TYP
MAX
MIN
MAX
V
IK
Input clamp voltage
V
CC
= 4.5V; I
IK
= –18mA
V
CC
= 4.5V; I
OH
= –3mA; V
I
= V
IL
or V
IH
V
CC
= 5.0V; I
OH
= –3mA; V
I
= V
IL
or V
IH
V
CC
= 4.5V; I
OH
= –32mA; V
I
= V
IL
or V
IH
V
CC
= 4.5V; I
OL
= 64mA; V
I
= V
IL
or V
IH
V
CC
= 5.5V; I
O
= 1mA; V
I
= GND or V
CC
–0.9
–1.2
–1.2
V
2.5
2.9
2.5
V
V
OH
High-level output voltage
3.0
3.4
3.0
V
2.0
2.4
2.0
V
V
OL
V
RST
Low-level output voltage
Power-up output voltage
3
0.42
0.55
0.55
V
0.13
0.55
0.55
V
I
I
Input leakag
74ABT16373B
V
CC
= 5 5V; V = V
I
= V
CC
or GND
0 01
±
0.01
±
1
±
1
μ
A
V
CC
= 5.5V; V
I
= V
CC
or GND
V
CC
= 5.5V; V
I
= V
CC
V
CC
= 5.5V; V
I
= 0
V
CC
= 4.5V; V
I
= 0.8V
V
CC
= 4.5V; V
I
= 2.0V
V
CC
= 5.5V; V
I
= 0 to 5.5V
V
CC
= 0.0V; V
O
or V
I
≤
4.5V
V
CC
= 2.1V; V
O
= 0.5V; V
I
= GND or V
CC
;
V
OE
= GND
V
CC
= 5.5V; V
O
= 5.5V; V
I
= V
IL
or V
IH
V
CC
= 5.5V; V
O
= 0.0V; V
I
= V
IL
or V
IH
V
CC
= 5.5V; V
O
= 2.5V
Control pins
±
0.01
±
1
±
1
μ
A
μ
A
μ
A
I
I
Input leakage current
74ABTH16373B
Data pins
5
0.01
1
1
–1
–3
–5
50
50
I
HOLD
Bus Hold current A inputs
6
74ABTH16373B
–75
–75
μ
A
±
800
I
OFF
Power-off leakage current
±
5.0
±
100
±
100
μ
A
I
PU
/I
PD
Power-up/down 3-State
output current
4
±
5.0
±
50
±
50
μ
A
I
OZH
I
OZL
I
O
3-State output High current
0.5
10
10
μ
A
μ
A
3-State output Low current
Output current
1
–0.5
–10
–10
–50
–70
–180
–50
–180
mA
I
CEX
Output High leakage
current
V
CC
= 5.5V; V
O
= 5.5V; V
I
= GND or V
CC
0.1
50
50
μ
A
I
CCH
I
CCL
V
CC
= 5.5V; Outputs High, V
I
= GND or V
CC
V
CC
= 5.5V; Outputs Low, V
I
= GND or V
CC
V
CC
= 5.5V; Outputs 3-State;
V
I
CC
0.5
2
2
mA
Quiescent supply current
8
19
19
mA
I
CCZ
0.5
2
2
mA
I
CC
Additional supply current
per input pin
2
74ABT16373B
V
CC
= 5.5V; one input at 3.4V, other inputs
at V
CC
or GND
5
100
100
μ
A
I
CC
Additional supply current
per input pin
2
74ABTH16373B
V
CC
= 5.5V; one input at 3.4V, other inputs
at V
CC
or GND
0.5
1.5
1.5
mA
NOTES:
1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
2. This is the increase in supply current for each input at 3.4V.
3. For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power.
4. This parameter is valid for any V
CC
between 0V and 2.1V, with a transition time of up to 10msec. From V
CC
= 2.1 to V
CC
= 5V
±
10% a
transition time of up to 100
μ
sec is permitted.
5. Unused pins at V
CC
or GND.
6. This is the bus hold overdrive current required to force the input to the opposite logic state.
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