參數(shù)資料
型號(hào): BT849A
英文描述: Single-Chip Video Capture for PCI
中文描述: 單芯片的PCI視頻捕捉
文件頁數(shù): 95/141頁
文件大?。?/td> 1149K
代理商: BT849A
Brooktree
85
C
ONTROL
R
EGISTER
D
EFINITIONS
PCI Configuration Space
L848A_A
Bt848/848A/849A
Single-Chip Video Capture for PCI
Internal addressing of Bt848 registers occurs via AD[7:2] and the byte enable
bits of the PCI bus. The 8-bit byte-address for each of the following register loca-
tions is {AD[7:2], 00}. As a single-function device, Bt848 ignores bits AD[10:8].
CardBus CIS Pointer and Subsystem ID/VendorID registers are not implement-
ed in Bt848. User-definable features, BIST, Cache Line Size, and Expansion ROM
Base Address register are also not supported.
The following types are used to specify how the Bt848 registers are
implemented:
ROx: Read only with default value = x
RW:
Read/Write. All bits initialized to 0 at RST, unless otherwise
stated.
RW*: Same as RW, but data read may not be same as data written.
RR:
Same as RW, but
writing
a 1 resets corresponding bit location,
writing 0 has no effect.
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