參數(shù)資料
型號(hào): BU-61705F4-202
廠商: DATA DEVICE CORP
元件分類: 微控制器/微處理器
英文描述: 2 CHANNEL(S), MIL-STD-1553 CONTROLLER, CQFP72
封裝: 1 X 1 INCH, 0.155 INCH HEIGHT, CERAMIC, FP-72
文件頁數(shù): 42/52頁
文件大?。?/td> 359K
代理商: BU-61705F4-202
47
E8
H8
36
35
D6
RTAD4
H2
G7
G8
34
RTAD3
H7
33
RTAD0
32
31
SSFLAG
RT_AD_LAT
J5
G2
H6
30
CLOCK_IN
J6
29
DTACK
28
27
MSG_ERR
WC1
H5
J2
F1
J7
H4
26
GROUND
H3
25
INCMD
24
23
22
DTREQ
MEMWR
SA1
21
RTAD2
A8
A7
H1
G3
A9
20
+5V Vcc-CH. B
J8
19
GROUND
18
17
16
GROUND
TX/RX-B
15
WC0
G4
14
MEMOE
G1
13
TX/RX_B
F2
E3
C4
D1
F3
12
WC2
E1
PGA
( NOTE 1)
11
SA2
10
9
8
WC3
C3
C2
B5
B4
WC4
CLK_SEL_0
7
TX/RX_A
D2
6
SA3
C1
5
TX/RX_A
PACKAGE
4
3
BU-61703 (3.3V / 5V)
BU-61705 (5V)
2
T/R
QFP
L_BRO
MSTCLR
1
RT_AD_ERR
J3
B1
72
71
+5V Vcc-CH. A
GROUND
E2
B6
B3
70
AUTO_CFG
J4
69
SA4
68
67
SA0
GROUND
J1
A5
C5
66
CLK_SEL_1
A4
65
GROUND
64
63
DTGRT
BRO_ENA
C7
B7
A3
C8
A6
62
ILLEGAL
C6
61
SRV_RQST
60
59
58
GBR
TX_INH
RT_FAIL
57
HS_FAIL
A1
D8
A2
B9
B8
56
RTACTIVE
C9
55
BUSY
54
53
52
D10
D15
D11
51
D9
50
D14
B2
49
D12
E7
G5
F7
F9
D7
48
D13
E9
PGA
( NOTE 1)
47
D7
46
45
44
D8
G9
G6
F8
D3
D5
D3
43
D2
H9
42
D0
J9
41
RTAD1
PACKAGE
40
39
BU-61703 (3.3V / 5V)
BU-61705 (5V)
38
RTADP
QFP
D4
D1
37
+5V/3.3V-LOGIC
GND
F6
N/A
XCVR TP
(ZAP VOLTB)
F4
P6 **
XCVR TP
(RESET_L)
E5
P5 **
GND
XCVR TP
(CLOCK)
E4
P4 **
E6
XCVR TP
(READOUTA)
D5
P3 **
N/A
XCVR TP
(READOUTB)
F5
P2 **
XCVR TP
(ZAP VOLTA)
D4
P1 **
GND
PGA
( NOTE 1)
QFP
D6
PACKAGE
BU-61703 (3.3V / 5V)
BU-61705 (5V)
N/A
** Note that the Test Output pins on the flat
pack are pads located on the bottom of
the package.
NOTE 1: This column is shown for refer-
ence only. There is no PGA package for
the initial product release.
TABLE 8. NMERICAL PIN LISTING
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