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參數(shù)資料
| 型號： | BU-61705F4-202 |
| 廠商： | DATA DEVICE CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 2 CHANNEL(S), MIL-STD-1553 CONTROLLER, CQFP72 |
| 封裝： | 1 X 1 INCH, 0.155 INCH HEIGHT, CERAMIC, FP-72 |
| 文件頁數(shù)： | 50/52頁 |
| 文件大?。?/td> | 359K |
| 代理商： | BU-61705F4-202 |
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In burst mode, a DMA handshake will not be initiated until after
all data words have been received over the 1553 data bus and
stored into the SSRT's internal FIFO. After the handshake has
been negotiated, the SSRT will burst the contents of the FIFO to
the local bus (D0-D15). After the reception of a valid non-mode
code receive command word followed by the correct number of
valid data words and assuming that all words are successfully
transferred to the subsystem, a negative pulse will be asserted
on the output Good Block Received (
). The width of this
pulse is two clock cycles.
RT-TO-RT TRANSFER ERRORS
For the case where the SSRT is the receiving RT of an RT-to-RT
transfer, if the transmitting RT does not respond within the spec-
ified time period, the SSRT will determine that a timeout condi-
tion has occurred. The value of the SSRT's RT-to-RT timeout
timer is in the range from 17.5 to 18.5 s, and is specified from
the mid-parity bit crossing of the transmit command word to the
mid-sync crossing of the transmitting RT's status word. In the
case of an RT-to-RT timeout, the SSRT will not respond and the
RT-TO-RT NO TRANSFER TIMEOUT bit (bit 2) of the SSRT's
BIT Word will be set to logic "1".
Also, if the SSRT is the receiving RT for an RT-to-RT transfer,
and the
bit of the second command word is logic "0", or the
RT address field for the transmit command is the same as for the
receive command, or the subaddress for the transmit command
is 00000 or 11111, the BU-61703/5 will not respond, and will set
the RT-to-RT SECOND COMMAND ERROR bit (bit 1) of the RT
BIT word to logic "1".
RT STATUS, ERROR HANDLING, AND MESSAGE
TIMING SIGNALS
Message transfers and transfer errors are indicated by means of
the
,
, and
error indication
outputs. Additional error detection and indication mechanisms
include updating of the internal command, RT status and BIT
word registers.
The BU-61703/5 provides a number of timing signals during the
processing of 1553 messages.
is asserted low when a
new command is received. At the end of a message (either valid
or invalid),
transitions from low to high.
As discussed above,
will be asserted low if the sub-
system fails to respond to
within the maximum amount of
time (10 s).
Following the last data word transfer for a valid non-mode code
receive message (for either non-burst mode or burst mode),
will be asserted low for two clock cycles.
is asserted as a low output level following any detect-
ed error in a received message, except for an error in the com-
mand word. If an error is detected in a received command word,
the rest of the message will be ignored.
ERR
_
MSG
GBR
DTREQ
FAIL
_
HS
INCMD
RTFAIL
ERR
_
MSG
FAIL
_
HS
INCMD
R
/
T
GBR
If
and/or
have been asserted (low), they be
cleared to logic "1" following receipt of a subsequent valid com-
mand word.
LOOPBACK TEST
The BU-61703/5 performs a loopback self-test at the end of each
non-broadcast message processed. The loopback test consists
of the following verifications: (1) The received version of every
transmitted word is verified for validity (encoding, bit count, pari-
ty) and correct sync type; and (2) The received version of the
last transmitted word is verified by means of a bit-by-bit compar-
ison to the transmitted version of this word. If there is a transmit-
ter timeout (660.5 s) and/or if the loopback test fails for one or
more transmitted words, the Terminal flag status word bit will be
set in response to the next non-broadcast message.
Note that the setting of the Terminal flag status bit following a
loop test failure may be disabled by means of the Auto-Config
feature; i.e., by setting Auto-Config bit 4 to logic "0".
STATUS WORD
The Broadcast Command Received bit is formulated internally
by the SSRT. The Message Error Status bit will be set if the cur-
rent command is a Transmit Status Word or Transmit Last
Command mode command if there was an error in the data por-
tion of the previous receive message. Message Error will also be
set if
has been sampled low by the SSRT for the cur-
rent message.
,
, and
(Subsystem Flag) will be sampled from their respective Status
input pins approximately 2 s following the mid-parity bit zero
crossing of the received Command Word. This time is 400 ns
maximum following after the L_BRO,
, SA4-0, and
WC/MC/CWC4-0 outputs have been presented valid.
PROTOCOL SELF-TEST
The SSRT includes a comprehensive, autonomous off-line self-
test of its internal protocol logic. The test includes a comprehen-
sive test of all registers, Manchester encoder and decoders,
transmitter failsafe timer, protocol logic, and the internal FIFO.
This test is completed in approximately 32,000 clock cycles. That
is, about 1.6 ms with a 20 MHz clock, 2.0 ms at 16 MHz, 2.7 ms
at 12 MHz, and 3.2 ms at 10 MHz. While the SSRT is performing
its off-line self-test, it will ignore (and therefore not respond to) all
messages received from the 1553 bus.
Unless disabled by means of the SSRT's Auto-Config feature,
the protocol self-test will be performed following the SSRT's
power turn-on (i.e., when
is released high). If the Auto-
Config feature is used and Auto-Config bit 5 is set to logic "0",
then a failure of the protocol self-test following power turn-on will
result in the SSRT not going online. If bit 5 is set to logic "0" and
the protocol self-test passes following power turn-on, the SSRT
will go online.
MSTCLR
R
/
T
SSFLAG
BUSY
SRV_RQST
ILLEGAL
FAIL
_
HS
ER
_
MSG
7
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