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參數(shù)資料
| 型號(hào)： | BU-62743G3-392Z |
| 廠商： | DATA DEVICE CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CQFP72 |
| 封裝： | 1 INCH, CERAMIC, QFP-72 |
| 文件頁(yè)數(shù)： | 48/99頁(yè) |
| 文件大?。?/td> | 578K |
| 代理商： | BU-62743G3-392Z |
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Data Device Corporation
62743_pre7_noSA-DB.DOC
www.ddc-web.com
8-07-02
52
TABLE 54. TYPICAL RT MEMORY MAP (SHOWN FOR 4K RAM)
WORD
ADDRESS
(HEX)
PCI BAR0
OFFSET
(HEX)
DESCRIPTION
0000-00FF
0000-01FE
Stack A
0100
0200
Stack Pointer A
0101
0202
Global Circular Buffer A Pointer
0102-0103
0204-206
RESERVED
0104
0208
Stack Pointer B
0105
020A
Global Circular Buffer A Pointer
0106-0107
020C-020E
RESERVED
0108-010F
0210-021E
Mode Code Selective Interrupt Table
0110-013F
0220-027E
Mode Code Data
0140-01BF
0280-037E
Lookup Table A
01C0-023F
0380-047E
Lookup Table B
0240-0247
0480-048E
Bust Bit Lookup Table
0248-025F
0490-04BE
(not used)
0260-027F
04C0-04FE
Data Block 0
0280-02FF
0500-05FE
Data Block 1-4
0300-03FF
0600-07FE
Command Illegalizing Table
0400-041F
0800-083E
Data Block 5
0420-043F
0840-087E
Data Block 6
0FE0-0FFF
1FC0-1FFE
Data Block 100
RT MEMORY MANAGEMENT
The PCI Enhanced Mini-ACE provides a variety of RT memory management
capabilities. As with the ACE, Mini-ACE(Plus) and Enhanced Mini-ACE, the choice
of
memory
management
scheme
is
fully
programmable
on
a
transmit/receive/broadcast subaddress basis.
In compliance with MIL-STD-1553B Notice 2, received data from broadcast
messages may be optionally separated from non-broadcast received data. For
each receive or broadcast subaddress, either a single-message data block, or a
variable-sized (128 to 8192 words) subaddress circular buffer may be allocated for
data storage. The use of Single Buffered mode is strongly recommended for
transmitted data words. The memory management scheme for individual
subaddresses is designated by means of the subaddress control word (reference
Table 56
).
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