參數(shù)資料
型號(hào): BU-62743G3-392Z
廠商: DATA DEVICE CORP
元件分類(lèi): 微控制器/微處理器
英文描述: 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CQFP72
封裝: 1 INCH, CERAMIC, QFP-72
文件頁(yè)數(shù): 66/99頁(yè)
文件大?。?/td> 578K
代理商: BU-62743G3-392Z
Data Device Corporation
62743_pre7_noSA-DB.DOC
www.ddc-web.com
8-07-02
69
The address definition for the Selective Monitor Lookup Table is illustrated in Table
60
.
Table 60. Monitor Selection Table Lookup Address
Address Bit
Description
15 (MSB)
Logic “0”
14
Logic “0”
13
Logic “0”
12
Logic “0”
11
Logic “0”
10
Logic “0”
9
Logic “1”
8
Logic “0”
7
Logic “1”
6
RTAD_4
5
RTAD_3
4
RTAD_2
3
RTAD_1
2
RTAD_0
1
TRANSMIT/RECEIVE*
0 (LSB)
SUBADDRESS_4
SELECTIVE MESSAGE MONITOR MEMORY ORGANIZATION
A typical memory map for the PCI Enhanced Mini-ACE, in the Selective Message
Monitor mode, assuming a 4K RAM space, is illustrated in Table 61. This mode of
operation defines several fixed locations in the RAM. These locations are allocated
in a way in which none of them overlap with the fixed RT locations. This allows for
the combined RT/Selective Message Monitor mode.
The fixed memory map consists of two Monitor Command Stack Pointers
(locations 102 and 106 hex), two Monitor Data Stack Pointers (locations 103 and
107 hex), and a Selective Message Monitor Lookup Table (locations 0280 through
02FF hex).
For this example, the Monitor Command Stack size is assumed to be 1K words,
and the Monitor Data Stack size is assumed to be 2K words.
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