參數(shù)資料
型號(hào)： BU-62843F4-140Z
廠商： DATA DEVICE CORP
元件分類(lèi)： 微控制器/微處理器
英文描述： 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CQFP72
封裝： 1 INCH, CERAMIC, QFP-72
文件頁(yè)數(shù)： 20/99頁(yè)
文件大?。?/td> 578K
代理商： BU-62843F4-140Z
Data Device Corporation
62743_pre7_noSA-DB.DOC
www.ddc-web.com
8-07-02
27
TABLE 27
. INTERRUPT STATUS REGISTER #1
(READ/WRITE 06h, PCI 18h)
,H, PCI IT
DESCRIPTION
15(MSB)
MASTER INTERRUPT
14
RAM PARITY ERROR
13
TRANSMITTER TIMEOUT
12
BC/RT COMMAND STACK ROLLOVER
11
MT COMMAND STACK ROLLOVER
10
MT DATA STACK ROLLOVER
9
HANDSHAKE FAILURE
8
BC RETRY
7
RT ADDRESS PARITY ERROR
6
TIME TAG ROLLOVER
5
RT CIRCULAR BUFFER ROLLOVER
4
RT SUBADDRESS CONTROL WORD
EOM
3
BC END OF FRAME
2
FORMAT ERROR
1
BC STATUS SET/RT MODE CODE/
MT PATTERN TRIGGER
0(LSB)
END OF MESSAGE
TABLE 28
. CONFIGURATION REGISTER #3
(READ/WRITE 07h, PCI 1Ch)
BIT
DESCRIPTION
15(MSB)
ENHANCED MODE ENABLE
14
BC/RT COMMAND STACK SIZE 1
13
BC/RT COMMAND STACK SIZE 0
12
MT COMMAND STACK SIZE 1
11
MT COMMAND STACK SIZE 0
10
MT DATA STACK SIZE 2
9
MT DATA STACK SIZE 1
8
MT DATA STACK SIZE 0
7
ILLEGALIZATION DISABLED
6
OVERRIDE MODE T/R* ERROR
5
ALTERNATE STATUS WORD ENABLE
4
ILLEGAL RX TRANSFER DISABLE
3
RESERVED, set to zero
2
RTFAIL*/RTFLAG* WRAP ENABLE
1
1553A MODE CODES ENABLE
0(LSB)
ENHANCED MODE CODE HANDLING
TABLE 29
. CONFIGURATION REGISTER #4
(READ/WRITE 08h, PCI 20h)
BIT
DESCRIPTION
15(MSB)
EXTERNAL BIT WORD ENABLE
14
INHIBIT BIT WORD IF BUSY
13
MODE COMMAND OVERRIDE BUSY
12
EXPANDED BC CONTROL WORD
TABLE 29
. CONFIGURATION REGISTER #4
(READ/WRITE 08h, PCI 20h)
BIT
DESCRIPTION
ENABLE
11
BROADCAST MASK ENA/XOR*
10
RETRY IF -A AND M.E.
9
RETRY IF STATUS SET
8
1ST RETRY ALT/SAME BUS*
7
2ND RETRY ALT/SAME BUS*
6
VALID M.E./NO DATA
5
VALID BUSY/NO DATA
4
MT TAG GAP OPTION
3
LATCH RT ADDR WITH CONFIG. REG. #5
2
TEST MODE 2
1
TEST MODE 1
0(LSB)
TEST MODE 0
TABLE 30
. CONFIGURATION REGISTER #5
(READ/WRITE 09h, PCI 24h)
BIT
DESCRIPTION
15(MSB)
12/16* MHZ CLOCK SELECT
14
SINGLE-ENDED SELECT
13
EXTERNAL TX INHIBIT A
12
EXTERNAL TX INHIBIT B
11
EXPANDED CROSSING ENABLED
10
RESPONSE TIMEOUT SELECT 1
9
RESPONSE TIMEOUT SELECT 0
8
GAP CHECK ENABLED
7
BROADCAST DISABLED
6
RT ADDRESS LATCH/TRANSPARENT*
5
RT ADDRESS 4
4
RT ADDRESS 3
3
RT ADDRESS 2
2
RT ADDRESS 1
1
RT ADDRESS 0
0(LSB)
RT ADDRESS PARITY
TABLE 31
. RT/MONITOR DATA STACK
ADDRESS REGISTER
(READ/WRITE 0Ah, PCI 28h)
BIT
DESCRIPTION
15(MSB)
RT/MONITOR DATA STACK ADDRESS 15
0(LSB)
RT/MONITOR DATA STACK ADDRESS 0
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