參數(shù)資料
型號: BU21023MUV-E2
廠商: Rohm Semiconductor
文件頁數(shù): 5/22頁
文件大小: 0K
描述: IC CTLR TOUCH PANEL 28VQFN
特色產(chǎn)品: Resistive Touchscreen Controller Ics
標(biāo)準(zhǔn)包裝: 1
類型: 電阻
觸摸面板接口: 4,2 線
輸入數(shù)/鍵: 1 TSC
分辨率(位): 8 b
評估套件: *
數(shù)據(jù)接口: I²C,串行,SPI?
電源電壓: 1.8V,3V
電流 - 電源: 4mA
工作溫度: -20°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 28-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 28-QFN
包裝: 標(biāo)準(zhǔn)包裝
其它名稱: BU21023MUV-E2DKR
13
COMMERCIALTEMPERATURERANGE
IDT72V70810 3.3V TIME SLOT INTERCHANGE
DIGITAL SWITCH 1,024 x 1,024
TABLE 10 — CONNECTION MEMORY BITS
NOTE:
1. If bit 13 (PC) of the corresponding connection memory location is 1 (device in processor mode), then these entire 8 bits (SAB0, CAB6 - CAB0) are output on the output channel
and stream associated with this location.
Bit
Name
Description
15
LPBK
When 1, the RX n channel m data comes from the TX n channel m. For proper per channel loopback
(Per Channel Loopback)
operations, set the delay offset register bits OFn[2:0] to zero for the streams which are in the loopback mode.
14
V/C
This bit is used to select between the variable (LOW) and constant delay (HIGH) mode on a
(Variable/Constant
per-channel basis.
Throughput Delay)
13
PC
When 1, the contents of the connection memory are output on the corresponding output channel and stream.
(Processor Channel)
Only the lower byte (bit 7 – bit 0) will be output to the TX output pins. When 0, the contents of the connection
memory are the data memory address of the switched input channel and stream.
12
CCO
This bit is output on the CCO pin one channel early. The CCO bit for stream 0 is output first.
(Control Channel Output)
11
OE
This bit enables the TX output drivers on a per-channel basis. When 1, the output driver functions
(Output Enable)
normally. When 0, the output driver is in a high-impedance state.
10
Unused
Must be zero for normal operation.
9,8,7(1) SAB2-0
The binary value is the number of the data stream for the source of the connection.
(Source Stream Address Bits)
6-0(1)
CAB6-0
The binary value is the number of the channel for the source of the connection.
(Source Channel Address Bits)
15
14
13
12
11
10
9876543210
LPBK
V/C
PC
CCO
OE
0
SAB2
SAB1
SAB0
CAB6
CAB5
CAB4
CAB3
CAB2
CAB1
CAB0
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