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| 型號： | BUF20820EVM |
| 廠商： | Texas Instruments |
| 文件頁數(shù)： | 13/29頁 |
| 文件大?。?/td> | 0K |
| 描述： | EVAL MOUDLE FOR BUF20820 |
| 標準包裝： | 1 |
| 系列： | * |
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BUF20820
SBOS330E DECEMBER 2005 REVISED OCTOBER 2008
www.ti.com
20
DYNAMIC GAMMA CONTROL
Dynamic gamma control is a technique used to improve
the picture quality in LCD TV applications. The brightness
in each picture frame is analyzed and the gamma curves
are adjusted on a frame-by-frame basis. The gamma
curves are typically updated during the short vertical
blanking period in the video signal. Figure 18 shows a
block diagram using the BUF20820 for dynamic gamma
control and VCOM output.
The BUF20820 is ideally suited for rapidly changing the
gamma curves because of its unique topology:
D double register input structure to the DAC;
D fast serial interface;
D simultaneous updating of all DACs by software. See
the Read/Write Operations to write to all registers and
the Output Latch sections.
The double register input structure saves programming
time by allowing updated DAC values to be pre-loaded
into the first register bank. Storage of this data can occur
while a picture is still being displayed. Because the data
are only stored into the first register bank, the DAC output
values remain unchanged—the display is unaffected.
During the vertical sync period, the DAC outputs (and
therefore, the gamma voltages) can be quickly updated
either by using an additional control line connected to the
LD pin, or through software—writing a ‘1’ in bit 15 of any
DAC register. For the details on the operation of the double
register input structure, see the Output Latch section.
Example: Update all 18 gamma registers simultaneously
via software.
Step 1: Check if LD pin is placed in HIGH state.
Step 2: Write DAC Registers 118 with bit 15 always ‘0’.
Step 3: Write any DAC register a second time with identi-
cal data. Make sure that bit 15 is ‘1’. All DAC channels will
be updated simultaneously after receiving the last bit of
data. (Note: this step may be eliminated by setting bit 15
of DAC 18 to ‘1’ in the previous step.)
Digital
Picture
Data
Histogram
Gamma
Adjustment
Algorithm
SDA
BUF20820
Gamma References
Timing Controller/
Controller
1 through 18
SCL
Source Driver
V
COM
Black
White
Figure 18. Dynamic Gamma Control
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