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參數(shù)資料
| 型號： | BW1220X |
| 英文描述： | Rad hard low voltage CMOS 16-bit bus buffer transceiver (3-state) with 3.6 V tolerant inputs and outputs |
| 中文描述： | BW1220X CCD信號處理器的攝像BW1220X |數(shù)據(jù)資料 |
| 文件頁數(shù)： | 11/11頁 |
| 文件大?。?/td> | 140K |
| 代理商： | BW1220X |
BW1223X
8BIT 40MSPS ADC
SEC ASIC
ANALOG
FEEDBACK
REQUEST
It should be quite helpful to our ADC core development if you specify your system requirements on
ADC in the following characteristic checking table and fill out the additional questions.
We appreciate your interest in our products. Thank you very much.
Characteristics
Min
Typ
Max
Unit
Remarks
Analog Power Supply Voltage
V
Digital Power Supply Voltage
V
Bit Resolution
Bit
Reference Input Voltage
V
Analog Input Voltage
V
pp
Operating Temperature
°C
Integral Non-linearity Error
LSB
Differential Non-linearity Error
LSB
Bottom Offset Voltage Error
LSB
Top Offset Voltage Error
LSB
Maximum Conversion Rate
MSPS
Dynamic Supply Current
mA
Power Dissipation
mW
Signal-to-noise+distortion Ratio
dB
Pipeline Delay
CLK
Digital Output Format
(Provide detailed description &
timing diagram)
1. Between single input-output and differential input-output configurations, which one is suitable for your
system and why
2. Please comment on the internal/external pin configurations you want our ADC to have, if you have
any reason to prefer some type of configuration.
3. Freely list those functions you want to be implemented in our ADC, if you have any.
11 / 11
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| BW1221L | Rad hard low voltage CMOS 16-bit bus buffer transceiver (3-state) with 3.6 V tolerant inputs and outputs |
| BW1221L_2CLK | Rad hard low voltage CMOS 16-bit bus buffer transceiver (3-state) with 3.6 V tolerant inputs and outputs |
| BW1221L_3CLK | Rad hard low voltage CMOS 16-bit bus buffer transceiver (3-state) with 3.6 V tolerant inputs and outputs |
| BW1222L | Rad hard low voltage CMOS 16-bit D-type latch (3-state) with 3.6 V tolerant inputs and outputs |
| BW1237X | Rad hard low voltage CMOS 16-bit D-type Flip-Flop (3-state) with 3.6 V tolerant inputs and outputs |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| BW1221L | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:BW1221L 10Bit 80MSPS Dual DAC BW1221L|Data Sheet |
| BW1221L_2CLK | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:BW1221L_2CLK 10BIT|Data Sheet |
| BW1221L_3CLK | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:BW1221L_3CLK 10Bit 30MSPS TRIPLE DAC|Data Sheet |
| BW1222L | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:BW1222L AFE For CCD/CIS Signal Processor|Data Sheet |
| BW1223X | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:BW1223X 8Bit 40MSPS ADC BW1223X|Data Sheet |
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