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參數(shù)資料
| 型號： | BW1254X |
| 英文描述： | Rad hard low voltage CMOS 16-bit bus buffer transceiver (3-state) with 3.6 V tolerant inputs and outputs |
| 中文描述： | BW1254X 4-14高達10MSPS模數(shù)轉(zhuǎn)換器BW1254X |數(shù)據(jù)資料 |
| 文件頁數(shù)： | 11/13頁 |
| 文件大?。?/td> | 140K |
| 代理商： | BW1254X |
SEC ASIC
BW1251X
12bit 500KSPS ADC
MIXED
PHANTOM CELL INFORMATION
NAME
I/O TYPE
Pin Usage
PIN DESCRIPTION
AINT
AI
Internal/External
AINT signal should not be crossed by any signals
and should not run next to digital signals to minimize
capacitive coupling between the two signals.
STBY
CKIN
D[11:0]
EOC
STC
VREF
AGND
VDDA
VBBA
VSSA
VSSD
VDDD
DI
DI
DO
DO
DI
AI
AI
AP
AG
AG
DG
DP
Internal/External
Internal/External
Internal/External
Internal/External
Internal/External
External
External
External
External
External
External
External
Voltage reference lines (VREF and AGND) must be wide
metal to reduce voltage drop of metal lines.
1. It is recommended that you use thick analog power metal.
When connected to PAD, the path should be kept as short
as possible.
2. Digital power and analog power are separately used.
DO[2]
DO[1]
DO[3]
DO[6]
DO[7]
DO[9]
DO[10]
DO[5]
DO[4]
DO[11]
DO[8]
STC
CKIN
EOC
VDDD
VSSD
STBY
VREF
AGND
VSSA
AINT
VDDA
bw1251x
VBBA
DO[0]
11/12
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