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參數(shù)資料
| 型號： | C509-L |
| 廠商： | SIEMENS AG |
| 元件分類： | 8位微控制器 |
| 英文描述： | 8-Bit CMOS Microcontroller |
| 中文描述： | 8位CMOS微控制器 |
| 文件頁數(shù)： | 22/74頁 |
| 文件大?。?/td> | 1607K |
| 代理商： | C509-L |
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Semiconductor Group
21
09.96
C509-L
The Bootstrap Loader
The C509-L includes a bootstrap mode, which is activated by setting the PRGEN pin at logic high
level at the rising edge of the RESET or the HWPD signal (bit PRGEN1=1). In this mode software
routines of the bootstrap loader, located at the addresses 0000H to 01FFH in the boot ROM will be
executed. Its purpose is to allow the easy and quick programming of the internal XRAM (F400H to
FFFFH) via serial interface while the MCU is in-circuit. This allows to transfer custom routines to the
XRAM, which will program an external 64 KByte FLASH memory. The serial routines of the
bootstrap loader may be replaced by own custom software or even can be blocked to prevent
unauthorized persons from reading out or writing to the external FLASH memory. Therefore the
bootstrap loader checks an external FLASH memory for existing custom software and executes it.
The bootstrap loader consists of three functional parts which represent the three phases as
described below.
Phase I : Check for existing custom software in the external FLASH memory and execute it.
Phase II : Establish a serial connection and automatically synchronize to the transfer speed (baud
rate) of the serial communication partner (host).
Phase III : Perform the serial communication to the host. The host controls the bootstrap loader by
sending header informations, which select one of four operating modes. These modes
are :
Mode 0 : Transfer a custom program from the host to the XRAM (F400H - FFFFH).
This mode returns to the beginning of phase III.
Mode 1 : Execute a custom program in the XRAM at any start address from F400H to
FFFFH.
Mode 2 : Check the contents of any area of the external FLASH memory by cal-
culating a checksum. This mode returns to the beginning of phase III.
Mode 3 : Execute a custom program in the FLASH memory at any start address
beyond 0200H (at addresses 0000H to 01FFH the boot-ROM is active).
The three phases of the bootstrap loader program and their connections are illustrated in
figure 10
.
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