參數(shù)資料
型號: C8051F000
廠商: Silicon Laboratories Inc
文件頁數(shù): 35/171頁
文件大?。?/td> 0K
描述: IC 8051 MCU 32K FLASH 64TQFP
標準包裝: 160
系列: C8051F00x
核心處理器: 8051
芯體尺寸: 8-位
速度: 20MHz
連通性: SMBus(2 線/I²C),SPI,UART/USART
外圍設備: 欠壓檢測/復位,POR,PWM,溫度傳感器,WDT
輸入/輸出數(shù): 32
程序存儲器容量: 32KB(32K x 8)
程序存儲器類型: 閃存
RAM 容量: 256 x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x12b,D/A 2x12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 64-TQFP
包裝: 托盤
C8051F000/1/2/5/6/7
C8051F010/1/2/5/6/7
1.1.3.
Additional Features
The C8051F000 MCU family has several key enhancements both inside and outside the CIP-51 core to improve its
overall performance and ease of use in the end applications.
The extended interrupt handler provides 21 interrupt sources into the CIP-51 (as opposed to 7 for the standard
8051), allowing the numerous analog and digital peripherals to interrupt the controller. An interrupt driven system
requires less intervention by the MCU, giving it more effective throughput. The extra interrupt sources are very
useful when building multi-tasking, real-time systems.
There are up to seven reset sources for the MCU: an on-board VDD monitor, a Watchdog Timer, a missing clock
detector, a voltage level detection from Comparator 0, a forced software reset, the CNVSTR pin, and the /RST pin.
The /RST pin is bi-directional, accommodating an external reset, or allowing the internally generated POR to be
output on the /RST pin. Each reset source except for the VDD monitor and Reset Input Pin may be disabled by the
user in software.
The WDT may be permanently enabled in software after a power-on reset during MCU
initialization.
The MCU has an internal, stand alone clock generator which is used by default as the system clock after any reset.
If desired, the clock source may be switched on the fly to the external oscillator, which can use a crystal, ceramic
resonator, capacitor, RC, or external clock source to generate the system clock. This can be extremely useful in low
power applications, allowing the MCU to run from a slow (power saving) external crystal source, while periodically
switching to the fast (up to 16MHz) internal oscillator as needed.
Figure 1.5. On-Board Clock and Reset
WDT
XTAL1
XTAL2
OSC
Internal
Clock
Generator
System
Clock
CIP-51
Microcontroller
Core
Missing
Clock
Detector
(one-
shot)
WD
T
S
trobe
Software Reset
Extended Interrupt
Handler
Clock Select
/RST
+
-
VDD
Supply
Reset
Timeout
(wired-OR)
SystemReset
Supply
Monitor
PRE
Reset
Funnel
+
-
CP0+
Comparator 0
CP0-
(Port
I/O)
Crossbar
CNVSTR
(CNVSTR
reset
enable)
(CP0
reset
enable)
EN
WD
T
Enabl
e
EN
MC
D
Enabl
e
13
Rev. 1.7
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