參數(shù)資料
型號(hào)： C8051F221R
廠商： Silicon Laboratories Inc
文件頁數(shù)： 3/146頁
文件大小： 0K
描述： IC 8051 MCU 8K FLASH 32LQFP
標(biāo)準(zhǔn)包裝： 1
系列： C8051F2xx
核心處理器： 8051
芯體尺寸： 8-位
速度： 25MHz
連通性： SPI，UART/USART
外圍設(shè)備： 欠壓檢測(cè)/復(fù)位，POR，WDT
輸入/輸出數(shù)： 22
程序存儲(chǔ)器容量： 8KB（8K x 8）
程序存儲(chǔ)器類型： 閃存
RAM 容量： 256 x 8
電壓 - 電源 (Vcc/Vdd)： 2.7 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 22x8b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 32-LQFP
包裝： 剪切帶 (CT)
其它名稱： 336-1009-1
C8051F2xx
100
Rev. 1.6
13.1. External Crystal Example
If a crystal were used to generate the system clock for the MCU, the circuit would be as shown in
Figure 13.1, Option 1. For an ECS-110.5-20-4 crystal, the resonate frequency is 11.0592 MHz, the intrin-
sic capacitance is 7 pF, and the ESR is 60 W. The compensation capacitors should be 33 pF each, and
the PWB parasitic capacitance is estimated to be 2 pF. The appropriate External Oscillator Frequency
Control value (XFCN) from the Crystal column in the table in SFR Definition 13.2 (OSCXCN Register)
should be 111b.
The Crystal Oscillator Valid Flag (XTLVLD in register OSCXCN) is set to logic 1 by hardware when the
external oscillator is running and stable. The XTLVLD detection circuit requires a startup time of at least
1ms between enabling the oscillator and checking the XTLVLD flag. Switching to the external oscillator
before 1ms can result in unpredictable behavior. The recommend procedure is:
1.
Enable the external oscillator
2.
Wait 1 ms
3.
Poll for XTLVLD '0' ==> '1'
4.
Switch to the external oscillator
Switching to the external oscillator before the crystal oscillator has stabilized could result in unpredictable
behavior.
NOTE: Crystal oscillator circuits are quite sensitive to PCB layout. The crystal should be placed as close
as possible to the XTAL pins on the device, keeping the traces as short as possible and shielded with
ground plane from any other traces which could introduce noise or interference.
13.2. External RC Example
If an external RC network were used to generate the system clock for the MCU, the circuit would be as
shown in Figure 13.1, Option 2. The capacitor must be no greater than 100 pF, but using a very small
capacitor will increase the frequency drift due to the PWB parasitic capacitance. To determine the required
External Oscillator Frequency Control value (XFCN) in the OSCXCN Register, first select the RC network
value to produce the desired frequency of oscillation. If the frequency desired is 100 kHz, let R = 246 kW
and C = 50 pF:
f = 1.23(103)/RC = 1.23(103) / [246 x 50] = 0.1 MHz = 100 kHz
XFCN log2(f/25 kHz)
XFCN log2(100 kHz/25 kHz) = log2(4)
XFCN 2, or code 010
13.3. External Capacitor Example
If an external capacitor were used to generate the system clock for the MCU, the circuit would be as shown
in Figure 13.1, Option 3. The capacitor must be no greater than 100 pF, but using a very small capacitor
will increase the frequency drift due to the PWB parasitic capacitance. To determine the required External
Oscillator Frequency Control value (XFCN) in the OSCXCN Register, select the capacitor to be used and
find the frequency of oscillation from the equations below. Assume VDD = 3.0 V and C = 50 pF:
f = KF / (C x VDD) = KF / (50 x 3)
f = KF / 150
If a frequency of roughly 90kHz is desired, select the K Factor from the table in SFR Definition 13.2 as KF
= 13:
f = 13 /150 = 0.087 MHz, or 87 kHz
Therefore, the XFCN value to use in this example is 011.
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