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鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉锛� | C8051T600QDB |
| 寤犲晢锛� | Silicon Laboratories Inc |
| 鏂囦欢闋佹暩(sh霉)锛� | 116/188闋� |
| 鏂囦欢澶�?銆�?/td> | 0K |
| 鎻忚堪锛� | BOARD SOCKET DAUGHTER QFN |
| 妯�(bi膩o)婧�(zh菙n)鍖呰锛� | 1 |
| 妯″/鏉块鍨嬶細 | QFN 鎻掑彛妯″ |
| 閬╃敤浜庣浉闂�(gu膩n)鐢�(ch菐n)鍝侊細 | C8051T600DK |
| 鍏跺畠鍚嶇ū锛� | 336-1406 |
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Rev. 1.2
33
C8051T600/1/2/3/4/5/6
Table 8.3. Port I/O DC Electrical Characteristics
VDD = 1.8 to 3.6 V, 鈥�40 to +85 掳C unless otherwise specified.
Parameters
Conditions
Min
Typ
Max
Units
Output High Voltage
IOH = 鈥�3 mA, Port I/O push-pull
IOH = 鈥�10 A, Port I/O push-pull
IOH = 鈥�10 mA, Port I/O push-pull
VDD - 0.3
VDD - 0.1
鈥�
VDD - 0.5
鈥�
V
Output Low Voltage
IOL = 8.5 mA
IOL = 10 A
IOL = 25 mA
鈥�
0.4 x VDD
0.6
0.1
鈥�
V
Input High Voltage
0.7 x VDD
鈥斺€�
V
Input Low Voltage
鈥�
0.6
V
Input Leakage
Current
Weak Pullup Off
Weak Pullup On, VIN = 0 V
鈥�1
鈥�
25
1
50
A
鐩搁棞(gu膩n)PDF璩囨枡 |
PDF鎻忚堪 |
|---|---|
| IDC5020ER331M | INDUCTOR POWER 330UH 0.6A SMD |
| C8051T606ZDB | CARD DAUGHTER QFN10 SOCKET |
| AK711-1.8 | CABLE PRINTER IEEE1284 1.8M |
| IDC5020ER330M | INDUCTOR POWER 33UH 2.1A SMD |
| EASOIC | MODULE ADAPTER W/SOIC SOCKET |
鐩搁棞(gu膩n)浠ｇ悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉) |
鍙冩暩(sh霉)鎻忚堪 |
|---|---|
| C8051T600SDB | 鍔熻兘鎻忚堪:瀛愬崱鍜孫EM鏉� SOIC Socket Daughter Board RoHS:鍚� 鍒堕€犲晢:BeagleBoard by CircuitCo 鐢�(ch菐n)鍝�:BeagleBone LCD4 Boards 鐢ㄤ簬:BeagleBone - BB-Bone - Open Source Development Kit |
| C8051T600-SDB | 鍒堕€犲晢:Silicon Laboratories Inc 鍔熻兘鎻忚堪:Evaluation Board For Mixed Signal OTP EPROM MCU Family 鍒堕€犲晢:Silicon Laboratories Inc 鍔熻兘鎻忚堪:SOIC SOCKET DAUGHTER BOARD FOR C8051T60X - Boxed Product (Development Kits) |
| C8051T601 | 鍒堕€犲晢:SILABS 鍒堕€犲晢鍏ㄧū:SILABS 鍔熻兘鎻忚堪:Mixed Signal OTP EPROM MCU Family |
| C8051T601-GM | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 8K OTP 11Pin QFN RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT |
| C8051T601-GMR | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 8K OTP 11Pin QFN RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT |
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