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參數(shù)資料
| 型號： | CAT25128YI-GT2 |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | PROM |
| 英文描述： | 16K X 8 SPI BUS SERIAL EEPROM, PDSO8 |
| 封裝： | 4.40 X 3 MM, HALOGEN FREE AND ROHS COMPLIANT, MO-153, TSSOP-8 |
| 文件頁數(shù)： | 2/16頁 |
| 文件大?。?/td> | 172K |
| 代理商： | CAT25128YI-GT2 |
CAT25128
http://onsemi.com
10
Hold Operation
The HOLD input can be used to pause communication
between host and CAT25128. To pause, HOLD must be
taken low while SCK is low (Figure 11). During the hold
condition the device must remain selected (CS low). During
the pause, the data output pin (SO) is tristated (high
impedance) and SI transitions are ignored. To resume
communication, HOLD must be taken high while SCK is low.
Design Considerations
The CAT25128 device incorporates PowerOn Reset
(POR) circuitry which protects the internal logic against
powering up in the wrong state. The device will power up
into Standby mode after VCC exceeds the POR trigger level
and will power down into Reset mode when VCC drops
below the POR trigger level. This bidirectional POR
behavior protects the device against ‘brownout’ failure
following a temporary loss of power.
The CAT25128 device powers up in a write disable state
and in a low power standby mode. A WREN instruction
must be issued prior to any writes to the device.
After power up, the CS pin must be brought low to enter
a ready state and receive an instruction. After a successful
byte/page write or status register write, the device goes into
a write disable mode. The CS input must be set high after the
proper number of clock cycles to start the internal write
cycle. Access to the memory array during an internal write
cycle is ignored and programming is continued. Any invalid
opcode will be ignored and the serial output pin (SO) will
remain in the high impedance state.
Delivery State
The CAT25128 is shipped erased, i.e., all bytes are FFh.
Figure 11. HOLD Timing
SCK
SO
HIGH IMPEDANCE
Dashed Line = mode (1, 1)
tLZ
CS
HOLD
tCD
tHD
tCD
tHZ
相關(guān)PDF資料 |
PDF描述 |
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| CAT25C03GZ-1.8TE13 | 256 X 8 SPI BUS SERIAL EEPROM, PDSO8 |
| CAT25C17SI-1.8TE13 | 2K X 8 SPI BUS SERIAL EEPROM, PDSO8 |
| CAT25C03GVE | 256 X 8 SPI BUS SERIAL EEPROM, PDSO8 |
| CAT25C03GZA | 256 X 8 SPI BUS SERIAL EEPROM, PDSO8 |
| CAT25C17GV-TE13 | 2K X 8 SPI BUS SERIAL EEPROM, PDSO8 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CAT25128YI-GT3 | 功能描述:電可擦除可編程只讀存儲器 128K SPI Serial CMOS 電可擦除可編程只讀存儲器 RoHS:否 制造商:Atmel 存儲容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| CAT25-130JA | 功能描述:電阻器網(wǎng)絡(luò)與陣列 13ohm 5% Concave 8resistors RoHS:否 制造商:Vishay/Thin Film 產(chǎn)品類型:Networks 電路類型:Divider 電阻器數(shù)量: 電阻數(shù)值:10 kOhms 容差:0.1 % 溫度系數(shù): 管腳數(shù)量:3 工作溫度范圍:- 55 C to + 155 C 尺寸:1.02 mm W x 3.05 mm L x 1.4 mm H 引線間隔: 端接類型:SMD/SMT 封裝:Reel |
| CAT25-130JALF | 功能描述:電阻器網(wǎng)絡(luò)與陣列 13ohm 5% Concave 8resistors RoHS:否 制造商:Vishay/Thin Film 產(chǎn)品類型:Networks 電路類型:Divider 電阻器數(shù)量: 電阻數(shù)值:10 kOhms 容差:0.1 % 溫度系數(shù): 管腳數(shù)量:3 工作溫度范圍:- 55 C to + 155 C 尺寸:1.02 mm W x 3.05 mm L x 1.4 mm H 引線間隔: 端接類型:SMD/SMT 封裝:Reel |
| CAT25-131JA | 功能描述:電阻器網(wǎng)絡(luò)與陣列 130ohm 5% Concave 8resistors RoHS:否 制造商:Vishay/Thin Film 產(chǎn)品類型:Networks 電路類型:Divider 電阻器數(shù)量: 電阻數(shù)值:10 kOhms 容差:0.1 % 溫度系數(shù): 管腳數(shù)量:3 工作溫度范圍:- 55 C to + 155 C 尺寸:1.02 mm W x 3.05 mm L x 1.4 mm H 引線間隔: 端接類型:SMD/SMT 封裝:Reel |
| CAT25-131JALF | 功能描述:電阻器網(wǎng)絡(luò)與陣列 130ohm 5% Concave 8resistors RoHS:否 制造商:Vishay/Thin Film 產(chǎn)品類型:Networks 電路類型:Divider 電阻器數(shù)量: 電阻數(shù)值:10 kOhms 容差:0.1 % 溫度系數(shù): 管腳數(shù)量:3 工作溫度范圍:- 55 C to + 155 C 尺寸:1.02 mm W x 3.05 mm L x 1.4 mm H 引線間隔: 端接類型:SMD/SMT 封裝:Reel |
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