參數(shù)資料
型號: CAT28LV256T13E-20T
英文描述: 256K-Bit CMOS PARALLEL E2PROM
中文描述: 256K位CMOS并行E2PROM的
文件頁數(shù): 6/12頁
文件大?。?/td> 78K
代理商: CAT28LV256T13E-20T
CAT28LV256
6
Doc. No. 1071, Rev. B
ADDRESS
CE
OE
WE
DATA OUT
tAS
DATA IN
DATA VALID
HIGH-Z
tCS
tAH
tCH
tWC
tOEH
tBLC
tDH
tDS
tOES
tWP
ADDRESS
CE
OE
WE
tRC
DATA OUT
DATA VALID
DATA VALID
tCE
tOE
tOH
tAA
tOHZ
tHZ
VIH
HIGH-Z
tLZ
tOLZ
DEVICE OPERATION
Read
Data stored in the CAT28LV256 is transferred to the
data bus when
WE
is held high, and both
OE
and
CE
are
held low. The data bus is set to a high impedance state
when either
CE
or
OE
goes high. This 2-line control
architecture can be used to eliminate bus contention in
a system environment.
Byte Write
A write cycle is executed when both
CE
and
WE
are low,
and
OE
is high. Write cycles can be initiated using either
WE
or
CE
, with the address input being latched on the
falling edge of
WE
or
CE
, whichever occurs last. Data,
conversely, is latched on the rising edge of
WE
or
CE
,
whichever occurs first. Once initiated, a byte write cycle
automatically erases the addressed byte and the new
data is written within 10 ms.
Figure 3. Read Cycle
28LV256 F06
Figure 4. Byte Write Cycle [
WE
Controlled]
28LV256 F07
相關(guān)PDF資料
PDF描述
CAT28LV256T13E-25T 256K-Bit CMOS PARALLEL E2PROM
CAT28LV256T13E-30T 256K-Bit CMOS PARALLEL E2PROM
CAT28LV256 256K-Bit CMOS Parallel EEPROM(低壓,快速,低功耗,256K位(32K x 8位)并行CMOS EEPROM)
CAT28LV65PA-20T The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each
CAT28LV65KI-25T The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each
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