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參數(shù)資料
| 型號： | CAT9554AHV4I-T2 |
| 廠商： | ON Semiconductor |
| 文件頁數(shù)： | 13/14頁 |
| 文件大小： | 0K |
| 描述： | IC I/O EXPANDER I2C/SMBUS 16TQFN |
| 標(biāo)準(zhǔn)包裝： | 2,000 |
| 接口： | I²C，SM 總線 |
| 輸入/輸出數(shù)： | 8 |
| 中斷輸出： | 是 |
| 頻率 - 時鐘： | 400kHz |
| 電源電壓： | 2.3 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-WQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 16-TQFN（4x4） |
| 包裝： | 帶卷 (TR) |
| 包括： | POR |
CAT9554, CAT9554A
http://onsemi.com
8
Acknowledge
After a successful data transfer, each receiving device is
required to generate an acknowledge. The acknowledging
device pulls down the SDA line during the ninth clock cycle,
signaling that it received the 8 bits of data. The SDA line
remains stable LOW during the HIGH period of the
acknowledge related clock pulse (Figure 6).
The CAT9554/9554A responds with an acknowledge
after receiving a START condition and its slave address. If
the device has been selected along with a write operation, it
responds with an acknowledge after receiving each 8bit
byte.
When the CAT9554/9554A begins a READ mode it
transmits 8 bits of data, releases the SDA line, and monitors
the line for an acknowledge. Once it receives this
acknowledge, the CAT9554/9554A will continue to
transmit data. If no acknowledge is sent by the Master, the
device terminates data transmission and waits for a STOP
condition. The master must then issue a STOP condition to
return the CAT9554/9554A to the standby power mode and
place the device in a known state.
Registers and Bus Transactions
The CAT9554/9554A consist of an input port register, an
output port register, a polarity inversion register and a
configuration register. Table 7 shows the register address
information.
Table 7. REGISTER COMMAND BYTE
Command
(hex)
Protocol
Function
0x00
Read byte
Input port register
0x01
Read/write byte
Output port register
0x02
Read/write byte
Polarity inversion register
0x03
Read/write byte
Configuration register
The command byte is the first byte to follow the device
address byte during a write/read bus transaction. The
register command byte acts as a pointer to determine which
register will be written or read.
The input port register is a read only port. It reflects the
incoming logic levels of the I/O pins, regardless of whether
the pin is defined as an input or an output by the
configuration register. Writes to the input port register are
ignored.
Table 8. REGISTER 0 – INPUT PORT REGISTER
bit
I7
I6
I5
I4
I3
I2
I1
I0
default
1
Table 9. REGISTER 1 – OUTPUT PORT REGISTER
bit
O7
O6
O5
O4
O3
O2
O1
O0
default
1
Table 10. REGISTER 2 –
POLARITY INVERSION REGISTER
bit
N7
N6
N5
N4
N3
N2
N1
N0
default
0
Table 11. REGISTER 3 – CONFIGURATION REGISTER
bit
C7
C6
C5
C4
C3
C2
C1
C0
default
1
Figure 9. Acknowledge Timing
18
9
START
SCL FROM
MASTER
BUS RELEASE DELAY (TRANSMITTER)
ACK DELAY
ACK SETUP
BUS RELEASE DELAY (RECEIVER)
DATA OUTPUT
FROM TRANSMITTER
DATA OUTPUT
FROM RECEIVER
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CAT9554AWGI-T2 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Catalyst Semiconductor 功能描述: |
| CAT9554AWI-G | 功能描述:接口-I/O擴(kuò)展器 8-Bit Parallel IO RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel |
| CAT9554AWI-GT2 | 功能描述:接口-I/O擴(kuò)展器 I2C/SMBUS Expander 8B,w/Int RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel |
| CAT9554AYGI | 制造商:Rochester Electronics LLC 功能描述: 制造商:Catalyst Semiconductor 功能描述: |
| CAT9554AYGI-T2 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Catalyst Semiconductor 功能描述: |
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