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參數(shù)資料
| 型號： | CAT9554AHV4I-T2 |
| 廠商： | ON Semiconductor |
| 文件頁數(shù)： | 14/14頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC I/O EXPANDER I2C/SMBUS 16TQFN |
| 標(biāo)準(zhǔn)包裝： | 2,000 |
| 接口： | I²C，SM 總線 |
| 輸入/輸出數(shù)： | 8 |
| 中斷輸出： | 是 |
| 頻率 - 時鐘： | 400kHz |
| 電源電壓： | 2.3 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-WQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 16-TQFN（4x4） |
| 包裝： | 帶卷 (TR) |
| 包括： | POR |
CAT9554, CAT9554A
http://onsemi.com
9
The output port register sets the outgoing logic levels of
the I/O ports, defined as outputs by the configuration
register. Bit values in this register have no effect on I/O pins
defined as inputs. Reads from the output port register reflect
the value that is in the flipflop controlling the output, not
the actual I/O pin value.
The polarity inversion register allows the user to invert the
polarity of the input port register data. If a bit in this register
is set (“1”) the corresponding input port data is inverted. If
a bit in the polarity inversion register is cleared (“0”), the
original input port polarity is retained.
The configuration register sets the directions of the ports.
Set the bit in the configuration register to enable the
corresponding port pin as an input with a high impedance
output driver. If a bit in this register is cleared, the
corresponding port pin is enabled as an output. At
powerup, the I/Os are configured as inputs with a weak
pullup resistor to VCC.
Data is transmitted to the CAT9554/9554A registers using
The CAT9554/9554A registers are read according to the
command byte has been sent, the register which was
addressed will continue to be accessed by reads until a new
command byte will be sent.
12
34
5
6
7
8
9
SCL
SDA
WRITE TO
PORT
DATA OUT FROM PORT
S 0100 A2
A0 0
A
A1
000
0 0
00 1
A
DATA 1
A P
acknowledge from slave
acknowledge
from slave
slave address
command byte
data to port
start condition
stop
condition
DATA 1 VALID
Figure 10. Write to Output Port Register
12
34
5
6
7
8
9
SCL
SDA
WRITE TO
REGISTER
S 0100 A2
A0 0
A
A1
000
0 0
01 1/0
DATA 1
A
A P
acknowledge from slave
acknowledge
from slave
slave address
command byte
data to register
start condition
stop
condition
Figure 11. Write to Configuration or Polarity Inversion Register
R/W
tpv
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CAT9554AWGI-T2 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Catalyst Semiconductor 功能描述: |
| CAT9554AWI-G | 功能描述:接口-I/O擴(kuò)展器 8-Bit Parallel IO RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel |
| CAT9554AWI-GT2 | 功能描述:接口-I/O擴(kuò)展器 I2C/SMBUS Expander 8B,w/Int RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel |
| CAT9554AYGI | 制造商:Rochester Electronics LLC 功能描述: 制造商:Catalyst Semiconductor 功能描述: |
| CAT9554AYGI-T2 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Catalyst Semiconductor 功能描述: |
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