參數(shù)資料
型號: CDP68HC68T1M2Z96
廠商: Intersil
文件頁數(shù): 1/23頁
文件大?。?/td> 0K
描述: IC RTC RAM/SPI SERIAL 16-SOIC
標準包裝: 1,000
類型: 時鐘/日歷
特點: 警報器,閏年,方波輸出,監(jiān)視計時器
存儲容量: 32B
時間格式: HH:MM:SS(12/24 小時)
數(shù)據(jù)格式: YY-MM-DD-dd
接口: SPI
電源電壓: 3 V ~ 6 V
電壓 - 電源,電池: 2.2 V ~ 6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 16-SOIC(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 16-SOIC
包裝: 帶卷 (TR)
1
FN1547.8
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
| Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Harris Corporation 1997. Copyright Intersil Americas Inc. 2001, 2004-2007. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
CDP68HC68T1
CMOS Serial Real-Time Clock With RAM
and Power Sense/Control
The CDP68HC68T1 Real-Time Clock provides a
time/calendar function, a 32 byte static RAM, and a 3 wire
Serial Peripheral Interface (SPI Bus). The primary function of
the clock is to divide down a frequency input that can be
supplied by the on-board oscillator in conjunction with an
external crystal or by an external clock source. The internal
oscillator can operate with a 32kHz, 1MHz, 2MHz, or 4MHz
crystal. An external clock source with a 32kHz, 1MHz, 2MHz,
4MHz, 50Hz or 60Hz frequency can be used to drive the
CDP68HC68T1. The time registers hold seconds, minutes,
and hours, while the calendar registers hold day-of-week,
date, month, and year information. The data is stored in BCD
format. In addition, 12 or 24 hour operation can be selected.
In 12 hour mode, an AM/PM indicator is provided. The T1
has a programmable output which can provide one of seven
outputs for use elsewhere in the system.
Computer handshaking is controlled with a “wired-OR” interrupt
output. The interrupt can be programmed to provide a signal as
the result of:
1. An alarm programmed to occur at a predetermined
combination of seconds, minutes, and hours.
2. One of 15 periodic interrupts ranging from sub-second to
once per day frequency.
3. A power fail detect. The PSE output and the VSYS input are
used for external power control. The CPUR output is
available to reset the processor under power-down
conditions. CPUR is enabled under software control and
can also be activated via the CDP68HC68T1’s watchdog. If
enabled, the watchdog requires a periodic toggle of the CE
pin without a serial transfer.
Features
SPI (Serial Peripheral Interface)
Full Clock Features
- Seconds, Minutes, Hours (12/24, AM/PM), Day of
Week, Date, Month, Year (0 to 99), Automatic Leap Year
32 Wordx8-Bit RAM
Seconds, Minutes, Hours Alarm
Automatic Power Loss Detection
Low Minimum Standby (Timekeeping) Voltage . . . . . 2.2V
Selectable Crystal or 50/60Hz Line Input
Buffered Clock Output
Battery Input Pin that Powers Oscillator and also
Connects to VDD Pin When Power Fails
Three Independent Interrupt Modes
-Alarm
- Periodic
- Power-Down Sense
Pb-Free Available (RoHS Compliant)
Pinouts
CDP68HC68T1
(16 LD PDIP, SOIC)
TOP VIEW
CDP68HC68T1
(20 LD SOIC)
TOP VIEW
9
10
11
12
13
14
16
15
8
7
6
5
4
3
2
1
CLKOUT
CPUR
INT
SCK
MOSI
MISO
VSS
CE
VDD
XTAL IN
VBATT
VSYS
XTAL OUT
LINE
POR
PSE
11
12
13
14
15
16
17
18
20
19
10
9
8
7
6
5
4
3
2
1
CLK OUT
CPUR
INT
NC
SCK
MOSI
CE
MISO
VSS
PSE
VDD
XTAL IN
NC
VBATT
XTAL OUT
VSYS
NC
LINE
POR
Data Sheet
October 29, 2007
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