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參數(shù)資料
| 型號(hào)： | CG3020-7DB |
| 元件分類(lèi)： | 電源模塊 |
| 英文描述： | 3-OUTPUT 25 W DC-DC REG PWR SUPPLY MODULE |
| 文件頁(yè)數(shù)： | 10/16頁(yè) |
| 文件大小： | 283K |
| 代理商： | CG3020-7DB |
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Board Mountable
DC-DC Converters
G Series
Edition 5/5.2000
3/16
Functional Description
The input voltage is fed via the Vi+ and the Vi– pins and an
input
π-filter to a zero-voltage switching (ZVS) flyback con-
verter. The controlled resonant switching of the transistors
keeps the EMI noise low.
On the secondary side, depending upon the converter type,
two or three output voltages are available, all referenced to
common ground (Go). Each output has an individual filter
for further noise reduction designed without any restriction
to the dynamic behaviour.
The control circuit on the secondary side senses the main
output voltage
Uo1 and generates a control signal which is
transmitted via a pulse transformer to the primary control
circuit. The primary control circuit transforms this signal with
respect to the maximum admissible output power into a
second control signal for the switching transistors.
The regulation for the second and third output voltages re-
lies on the close magnetic coupling of the transformer
windings and the circuit symmetry. Thanks to the unique
control philosophy of the flyback converter topology no
9
17
16
Vo1+
Go
R
T
/PDW
/SDW
/RST
CT1
6
7
8
Vo2+
Go
5 Vo3–
Secondary
Controller
Primary
Controller
2
1
TMON
i
4
3
Vi–
Vi+
Option D
Supervisory
Circuit
Input Filter
and TVS
ZVS
Flyback
Converter
Output Filter
/FAIL /SRQ
Uo1
Uo2
Uo3
0
Case 1
18
19
Uo OK or CT2
2
× 22 nF
1000 V
10
11
12
13
14
15
1 Pin not fitted with option B
2 Uo OK without option D, CT2 if with option D
03005
Fig. 1
Block diagram
minimum load is required at any of the outputs and no out-
put voltage will drift under no-load condition.
An optional voltage monitor and signal sequencer on the
secondary side generates shut-down and reset signals dur-
ing the power-up and power-down sequence for a control-
led turn-on and turn-off of a microprocessor or another cir-
cuit. The monitor circuit checks for proper converter func-
tion and monitors all output voltages wether they remain
within an upper and lower limit.
Any failure will be indicated by a /FAIL signal and may be
identified if necessary by an 8 bit diagnostic information.
Efficiency
Thanks to the latest integration methods, optimised zero-
voltage switching topology with synchronous rectifier on all
outputs and a unique control philosophy a very high effi-
ciency over the whole input voltage range is achieved. The
benefits are minimized heat dissipation and increased sys-
tem reliability.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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