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參數(shù)資料
| 型號(hào)： | CH5101A-Q |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | CMOS Monochrome Digital Video Camera |
| 中文描述： | 單色的CMOS數(shù)碼攝像機(jī) |
| 文件頁(yè)數(shù)： | 17/32頁(yè) |
| 文件大?。?/td> | 132K |
| 代理商： | CH5101A-Q |
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CHRONTEL
CH5101A
201-0000-033 Rev 1.0, 6/2/99
17
Mode / Output Format Register
Symbol: MOF
Address: 00h
Bits: 8
Register MOF determines the operating mode of the IC and the output data format. When bit 0 of register OF is low,
data will be output in 16-bit mode. When OF is high, data will be time multiplexed and output on the 8-bit bus
Y[7:0]. In the tables below, Y0 is the first pixel generated from the array on a given line, Y1 is the second pixel on
that line, etc. In CCIR modes, Y0i, Y1i data are the pixels interpolated between the Y0 and Y1, and Y1 and Y2
samples. For each of the possible modes, the format of the output data is shown below. The total amount of time
shown for each table is 24 cycles of MCLK when ELFA=0 and 48 cycles of MCLK when ELFA=1. The line number
in each table refers to which active video line is being output.
M[2:0] = 0 or 1, OF = 0, CIF2 = 0 (2 line pattern, CLKOUT = 6.75MHz (ELFA=0) or 3.375MHz (ELFA=1))
M[2:0] = 0 or 1, OF = 1, CIF2 = 0 (2 line pattern, CLKOUT = 13.5 MHz (ELFA=0) or 6.75MHz (ELFA=1))
M[2:0] = 0 or 1, OF = 0, CIF2 = 1 (1 line pattern, CLKOUT = 6.75MHz (ELFA=0) or 3.375MHz (ELFA=1))
M[2:0] = 0 or 1, OF = 1, CIF2 = 1 (1 line pattern, CLKOUT = 13.5 MHz (ELFA=0) or 6.75MHz (ELFA=1)
)
M[2:0]2 or 3, OF = 0 CIF2 = 0 (4 line pattern, CLKOUT = 6.75MHz (ELFA=0) or 3.375MHZ (ELFA=1))
BIT:
7
6
5
4
3
2
1
0
SYMBOL:
TYPE:
CIF2
ELFA
CVL
CHL
M2
M1
M0
OF
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
DEFAULT:
0
0
0
0
1
0
PUD6
1
Line
CLKOUT
1
2
3
4
5
6
1
Y[7:0]
Y0
Y1
Y2
Y3
Y4
Y5
2
Y[7:0]
Y0
Y1
Y2
Y3
Y4
Y5
Line
CLKOUT
1
2
3
4
5
6
7
8
9
10
11
12
1
Y[7:0]
128
Y0
128
Y1
128
Y2
128
Y3
128
Y4
128
Y5
2
Y[7:0]
128
Y0
128
Y1
128
Y2
128
Y3
128
Y4
128
Y5
Line
CLKOUT
1
2
3
4
5
6
1
Y[7:0]
Y0
Y1
Y2
Y3
Y4
Y5
2
Y[7:0]
Y0
Y1
Y2
Y3
Y4
Y5
Line
CLKOUT
1
2
3
4
5
6
7
8
9
10
11
12
1
Y[7:0]
128
Y0
128
Y1
128
Y2
128
Y3
128
Y4
128
Y5
2
Y[7:0]
128
Y0
128
Y1
128
Y2
128
Y3
128
Y4
128
Y5
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