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參數(shù)資料
| 型號： | CO4011SRL-F |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Single Chip CANopen Controller for Remote I/O |
| 中文描述： | 單芯片的CANopen控制器/遠(yuǎn)程I相O |
| 文件頁數(shù)： | 4/37頁 |
| 文件大?。?/td> | 391K |
| 代理商： | CO4011SRL-F |
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CO4011A-FL
Single Chip CANopen Controller for Remote I/O
frenzel + berg elektronik – Maximlianstr. 28 – 89231 Neu-Ulm– Germany - phone +49(0)731/970 570 - fax +49(0)731/970 5739 –
www.frenzel-berg.de
Page 4 of 4
Revision 1.39
May/19/2003
TEST: Reserved pin
Leave pin TEST unconnected.
OLIRQ#: Output Overload Interrupt
This active low input pin is provided to support output
overload monitoring. Connect output from output
overload control circuit to this input pin. If the
CO4011 scans a low level on pin OLIRQ#, the
device automatic enters the error state given in
Object 67FE.02 (default enter preoperational state).
Further more the Error Register (index 1001) is set to
0x03, indicating a current error.
Last but not least the device will send an emergency
telegram with error code 0x2310 indicating an
overload error.
If output overload monitoring is not to be used in
your application, make sure, that pin OLIRQ# is
forced to logic high level.
VCC, AVCC, VSS, AVSS: Power Supply Pins
Make sure that all ground and power supply pins are
connected to the same potential. Do not leave any
ground or power supply pins open. Connect
decoupling capacitors as close as possible to the
device. See chapter “Recommended Operation
Conditions” for details
RES#: Reset input pin
For a correct device reset, provide an active low
reset signal according to recommended operation
conditions to input RES#.
CFG0 to CFG2: Configuration input pins / LED
output pins
Set device configuration to preferred operation mode
using CFG0 to CFG3. Leaving any configuration
input unconnected may cause malfunction of the
device. It is strongly recommended forcing all con-
figuration input bits to either high or low level by
using external pull up/down resistors. Do not use
direct connection to VCC or VSS.
LED-Functions (active low):
CFG0 Chip-Status LED shows the Chip status
Always blinking:
10 % Duty cycle indicates no error
90 % Duty cycle indicates error
CFG1
CANopen RUN LED shows NMT state
according to DRP303-3
CFG2
CANopen Error LED shows Error state
according to DRP303-3
Note:
CFGx are input pins during start up and output
pins in normal operation mode. In order to prevent
short circuit overload a series resistor between CFGx
and configuration device (example DIP switch)
should be used. See also "typical application" for
details.
CFG3/WD: Configuration input / watchdog output
CFG3/WD is scanned during reset to switch the
CO4011 to enable additional CAN features. Then
CFG3/WD is switched to output and drives the
watchdog trigger. To monitor correct device
operation, this feature may be used in combination
with an external watchdog timer.
Note:
CFGx are input pins during start up and output
pins in normal operation mode. In order to prevent
short circuit overload a series resistor between CFGx
and configuration device (example DIP switch)
should be used. See also "typical application" for
details.
CANRX, CANTX: CAN interface pins
The CAN interface pins may be used for direct
connection to CAN transceivers like the 80C251. For
longer bus length or noisy or disturbed environments
it is strongly recommended to use galvanic isolation
with optocouplers between bus interface and
CANopen application, to improve system reliability.
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