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參數資料
| 型號： | CPC7514Z |
| 廠商： | IXYS Integrated Circuits Division |
| 文件頁數： | 5/15頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC LINE CARD ACCESS SWITC 20SOIC |
| 標準包裝： | 38 |
| 功能： | 線路卡接入交換 |
| 接口： | TTL |
| 電路數： | 2 |
| 電源電壓： | 3 V ~ 3.6 V |
| 電流 - 電源： | 4.5mA |
| 工作溫度： | -40°C ~ 110°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-SOIC（0.295"，7.50mm 寬） |
| 供應商設備封裝： | 20-SOIC |
| 包裝： | 管件 |
| 包括： | 免彈跳切換，第三級保護 |
| 其它名稱： | CLA379 |
INTEGRATED CIRCUITS DIVISION
CPC7514
R06
www.ixysic.com
13
3.6 External Protection Elements
The CPC7514 requires only over-voltage secondary
protection on the high-voltage side of the switch.
Additional external protection may be required on the
low-voltage side of the switch if the threshold of the
high-voltage side protector exceeds the safe operation
of the low-voltage side components. Because the fault
current seen by the low-voltage side protector is
limited by the switch’s active current limit circuitry, the
low-voltage side protector need not be as capable as
that of the high-voltage side protector. The
high-voltage side protector must limit voltage
transients to levels that do not exceed the breakdown
voltage or input-output isolation barrier of the
CPC7514. A foldback or crowbar type protector on the
high-voltage side is recommended to minimize
stresses on the CPC7514.
3.7 Thermal Design Assessment
A successful design utilizing the CPC7514 Quad High
Voltage Analog Switch Array is dependent on careful
consideration of the application’s environment and the
device’s thermal constraints. For matters regarding the
electrical design, this is simply a case of following the
parameters provided in the preceding tables and for
many this will be sufficient. However, those designers
wishing to push the operational limits envelope with
higher switch current and/or higher ambient operating
temperatures will need to consider the thermal
performance.
Being a real physical device the CPC7514 has a finite
thermal capability that when properly considered will
ensure appropriate behavior and performance.
Determination of the thermal constraint is easily
accomplished using the following power equations:
and
Where PVDD is the dissipated power drawn from the
VDD supply and PSW is the power dissipated by the
active switches. The VDD power can be calculated
page 7 while the power dissipated by the switches is
the sum of the concurrent active switches. Total switch
power is the sum of the maximum current through
each active switch times the On-Resistance of the
switch (ISWx
2 XR
ON).
The second equation is used to calculate the
maximum ambient temperature that the device can be
operated in based on the calculated total power of the
previous equation. PTOTAL, the value obtained in the
first equation;
T, the junction temperature rise of the
CPC7514 from ambient; and
JA, the thermal
impedance of the device package are used to
determine the maximum operating ambient
temperature.
Using the junction temperature rise equation
T=T
J -TA; the thermal impedance JA = 65.8C/W; and a
maximum junction temperature TJ-MAX = 110C, the equation
reduces to:
To avoid entering thermal shutdown, the value for the
maximum junction temperature was set to 110
C.
Conversely, it is possible to rework the equations to
determine the maximum switch current for a maximum
ambient current.
When using the individual switches of the CPC7514
within their allowable operating region, no restrictions
are placed on any other switch.
PTOTAL
PV
DD
PSW
+
=
PTOTAL
T
JA
---------
=
TAMAX
–
TJMAX
–
PTOTAL JA
–
=
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