Micrel M9999-101204 58 October 2004 Bit Function Operation D[7] Reserved Always write as zero; reads undefined. D[6] ADSTP Stop ADC" />
參數(shù)資料
型號： CS42L55-DNZR
廠商： Cirrus Logic Inc
文件頁數(shù)： 54/68頁
文件大?。?/td> 0K
描述： IC CODEC STER H-HDPN AMP 36-QFN
標(biāo)準(zhǔn)包裝： 6,000
類型： 立體聲音頻
數(shù)據(jù)接口： 串行
分辨率（位）： 24 b
ADC / DAC 數(shù)量： 1 / 1
三角積分調(diào)變： 是
動態(tài)范圍，標(biāo)準(zhǔn) ADC / DAC (db)： 95 / 99
電壓 - 電源，模擬： 1.65 V ~ 2.71 V
電壓 - 電源，數(shù)字： 1.65 V ~ 2.71 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 36-QFN
供應(yīng)商設(shè)備封裝： 36-QFN-EP（5x5）
包裝： 帶卷 (TR)
配用： 598-1506-ND - BOARD EVAL FOR CS42L55 CODEC
MIC3000
Micrel
M9999-101204
58
October 2004
Bit
Function
Operation
D[7]
Reserved
Always write as zero; reads undefined.
D[6]
ADSTP
Stop ADC Halts the analog to digital converter
0 = normal operation; 1 = stopped; Read/write.
D[5]
ADIDL
ADC idle flag
0 = busy; 1 = idle; Read/write.
D[4]
1SHOT
Triggers one-shot A/D conversion cycle
0 = normal operation; 1 = one-shot; Read/write.
D[3]
ADSPIN
Selects ADC spin-on-channel mode; do not
0 = normal operation; 1 = spin-on-channel;
enable ADC and FC spin-on-channel modes
Read/write.
simultaneously
D[2], D[1],
SPIN[2:0]
ADC and fault comparator (FC) channel select for ADC: 000 = temperature; 001 = voltage; 010 = VILD;
D[0]
spin-on-channel mode; do not enable ADC and
011 = VMPD; 100 = VRX; FC: 001 = VILD;
FC spin-on-channel modes simultaneously
001 = VMPD; 010 = VRX; Read/write.
Look-Up Table Index (LUTINDX)
Look-up table index as determined by temperature compensation logic
D[7]
D[6]
D[5]
D[4]
D[3]
D[2]
D[1]
D[0]
read/write
Default Value
0000 0000b = 00h
Serial Address
A6h = 1010011b
Byte Address
18 = 12h
The look-up table index is derived from the current temperature measurement and LUTOFF as follows:
INDEX
LUTOFF
=
+
T
AVG ()
2
where TAVG(n) is the current average temperature. This register allows the current table
index to be read by the host. The table base address must be added to LUTINDX to form a complete table index in
physical memory. A valid OEM password is required for access to this register. Otherwise, reads are undefined.
BIAS DAC Setting (APCDAC)
Current VBIAS setting
D[7]
D[6]
D[5]
D[4]
D[3]
D[2]
D[1]
D[0]
read only
Default Value
0000 0000b = 00h
Serial Address
A6h = 1010011b
Byte Address
20 = 14h
This register reflects (reads back) the value set in the APC register (APCSET0, APCSET1, or APCSET2 whichever is
selected). A valid OEM password is required for access to this register.
Modulation DAC Setting (MODDAC)
Current VMOD setting
D[7]
D[6]
D[5]
D[4]
D[3]
D[2]
D[1]
D[0]
read only
Default Value
0000 0000b = 00h
Serial Address
A6h = 1010011b
Byte Address
21 = 15h
This register reflects (reads back) the value set in the MODSET register. A valid OEM password is required for access
to this register.
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