參數(shù)資料
型號: CS4382A-CQZ
廠商: Cirrus Logic Inc
文件頁數(shù): 35/50頁
文件大?。?/td> 0K
描述: IC DAC 8CH 114DB 192KHZ 48LQFP
標(biāo)準(zhǔn)包裝: 250
位數(shù): 24
數(shù)據(jù)接口: 串行
轉(zhuǎn)換器數(shù)目: 8
電壓電源: 模擬和數(shù)字
功率耗散(最大): 680mW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 48-LQFP
供應(yīng)商設(shè)備封裝: 48-LQFP(7x7)
包裝: 托盤
輸出數(shù)目和類型: 16 電壓,單極
采樣率(每秒): 192k
配用: 598-1524-ND - BOARD EVAL FOR CS4382A DAC
其它名稱: 598-1061
40
DS618F2
CS4382A
6.6.3
Functional Mode (FM)
Default = 00
00 - Single-Speed Mode (4 to 50 kHz sample rates)
01 - Double-Speed Mode (50 to 100 kHz sample rates)
10 - Quad-Speed Mode (100 to 200 kHz sample rates)
11 - Direct Stream Digital Mode
Function:
Selects the required range of input sample rates or DSD Mode. All DAC pairs are required to be set to the
same functional mode setting before a speed-mode change is accepted. When DSD Mode is selected for
any channel pair, all pairs switch to DSD Mode.
6.7
Volume Control (Addresses 07h, 08h, 0Ah, 0Bh, 0Dh, 0Eh)
Note:
These eight registers provide individual volume and mute control for each of the eight channels.
The values for “xx” in the bit fields above are as follows:
Register address 07h - xx = A1
Register address 08h - xx = B1
Register address 0Ah - xx = A2
Register address 0Bh - xx = B2
Register address 0Dh - xx = A3
Register address 0Eh - xx = B3
Register address 10h - xx = A4
Register address 11h - xx = B4
6.7.1
Mute (MUTE)
Default = 0
0 - Disabled
1 - Enabled
Function:
The Digital-to-Analog converter output will mute when enabled. The quiescent voltage on the output will
be retained. The muting function is affected, similarly to attenuation changes, by the Soft and Zero Cross
bits. The MUTE pins will go active during the mute period according to the MUTEC bit.
76
543
21
0
xx_MUTE
xx_VOL6
xx_VOL5
xx_VOL4
xx_VOL3
xx_VOL2
xx_VOL1
xx_VOL0
00
000
00
0
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