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參數(shù)資料
| 型號： | CS4391A-KZZ |
| 廠商： | Cirrus Logic Inc |
| 文件頁數(shù)： | 27/40頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 24BIT 192KHZ W/VC 20TSSOP |
| 標準包裝： | 74 |
| 位數(shù)： | 24 |
| 數(shù)據(jù)接口： | 串行 |
| 轉(zhuǎn)換器數(shù)目： | 2 |
| 電壓電源： | 模擬和數(shù)字 |
| 功率耗散（最大）： | 175mW |
| 工作溫度： | -10°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-TSSOP（0.173"，4.40mm 寬） |
| 供應商設備封裝： | 20-TSSOP |
| 包裝： | 管件 |
| 輸出數(shù)目和類型： | 4 電壓，單極 |
| 采樣率（每秒）： | 192k |
| 其它名稱： | 598-1064-5 |
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CS4391A
DS600PP3
33
7. APPLICATIONS
7.1
Recommended Power-up
Sequence for Hardware Mode
1) Hold RST low until the power supplies, master,
and left/right clocks are stable.
2) Bring RST high.
7.2
Recommended Power-up
Sequence and Access to Control
Port Mode
1) Hold RST low until the power supply, master,
and left/right clocks are stable. In this state, the
control port is reset to its default settings and
CMOUT will remain low.
2) Bring RST high. The device will remain in a
low power state with CMOUT low and the con-
trol port is accessible.
3) Write 30h to register 5 within 10 ms cycles fol-
lowing the release of RST.
4) The desired register settings can be loaded
while keeping the PDN bit set to 1.
5) Set the PDN bit to 0 which will initiate the pow-
er-up sequence which requires approximately
10 S.
7.3
Analog Output and Filtering
The application note “Design Notes for a 2-Pole
Filter with Differential Input” discusses the second-
order Butterworth filter and differential to single-
ended converter which was implemented on the
CS4391A evaluation board, CDB4391A. The
CS4391A filter, as seen in Figure 14, is a linear
phase design and does not include phase or ampli-
tude compensation for an external filter. Therefore,
the DAC system phase and amplitude response will
be dependent on the external analog circuitry.
AMUTEC
AOUTA+
GND
C43
10UF
GND
1.18K
R17
NC
4
3
2
1
CON_RCA_RA
J3
2
3
1
2SC2878
Q1
2K
R25
3
1
2
Q3
MMUN2111LT1
12
HDR8
HDR1X2
AOUTA
VA+3/+5
R20
560
3
1
2
Q4
MMUN2211LT1
R24
5.62K
R5
47K
R28
5.62K
1.18K
R18
5.62K
R15
5.62K
R26
C49
.1UF
V-
V+
+
-
4
8
1
2
3
U11
MC33078D
C48
.1UF
GND
C42
10UF
COG
2700PF
C7
COG
560PF
C6
COG
C5
560PF
COG
2700PF
C14
VCC
VEE
AOUTA-
Figure 15. CS4391A Output Filter
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| CS4391A-KZZR | 功能描述:數(shù)模轉(zhuǎn)換器- DAC IC 24B 192kHz Stereo DAC w/Vol Cntrl RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| CS4391-KZ | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:24-Bit, 192 kHz Stereo DAC with Volume Control |
| CS4391-KZZ | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:24-Bit, 192 kHz Stereo DAC with Volume Control |
| CS4392 | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:24-Bit, 192 kHz Stereo DAC with Volume Control |
| CS4392_04 | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:24-Bit, 192 kHz Stereo DAC with Volume Control |
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