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參數(shù)資料
| 型號： | CS49DV8C-CVZR |
| 廠商： | Cirrus Logic Inc |
| 文件頁數(shù)： | 13/30頁 |
| 文件大小： | 0K |
| 描述： | IC DSP 32BIT DUAL AUDIO 128-LQFP |
| 標(biāo)準包裝： | 750 |
| 系列： | CS49DV8 |
| 類型： | 定點 |
| 接口： | I²C，SPI，UART |
| 時鐘速率： | 150MHz |
| 非易失內(nèi)存： | ROM（576 kB） |
| 芯片上RAM： | 328kB |
| 電壓 - 輸入/輸出： | 3.30V |
| 電壓 - 核心： | 1.80V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 128-LQFP |
| 供應(yīng)商設(shè)備封裝： | 128-LQFP（14x20） |
| 包裝： | 帶卷 (TR) |
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Copyright 2008 Cirrus Logic, Inc.
DS868PP2
CS49DV8C Data Sheet
32-bit Audio DSP Family
5.15 Switching Characteristics — Digital Audio Output Port
Figure 9. Digital Audio Port Timing Master Mode
Parameter
Symbol
Min
Max
Unit
DAO_MCLK period
Tdaomclk
40
-
ns
DAO_MCLK duty cycle
-
45
55
%
DAO_SCLK period for Master or Slave mode1
1.Master mode timing specifications are characterized, not production tested.
Tdaosclk
40
-
ns
DAO_SCLK duty cycle for Master or Slave mode1
-40
60
%
Master Mode (Output A1 Mode)1,2
2.Master mode is defined as the CS49DVxx driving both DAO_SCLK, DAO_LRCLK. When MCLK is an input, it is divided
to produce DAO_SCLK, DAO_LRCLK.
DAO_SCLK delay from DAO_MCLK rising edge,
DAO_MCLK as an input
tdaomsck
-19
ns
DAO_LRCLK delay from DAO_SCLK transition, respectively3
3.This timing parameter is defined from the non-active edge of DAO_SCLK. The active edge of DAO_SCLK is the point
at which the data is valid.
tdaomstlr
-8
ns
DAO_SCLK delay from DAO_LRCLK transition, respectively3
tdaomlrts
-8
ns
DAO1_DATA[3..0], DAO2_DATA[1..0]
delay from DAO_SCLK transition3
tdaomdv
-10
ns
Slave Mode (Output A0 Mode)4
4.Slave mode is defined as DAO_SCLK, DAO_LRCLK driven by an external source.
DAO1_DATA[3..0], DAO2_DATA[1..0]
delay from DAO_SCLK transition3
tdaosdv
-15
ns
DAO_LRCLK delay from DAO_SCLK transition, respectively3
tdaosstlr
-30
ns
DAO_SCLK delay from DAO_LRCLK transition, respectively3
tdaoslrts
-15
ns
DAO_MCLK
DAO_SCLK
DAO_LRCLK
DAOn_DATAn
tdaomlclk
tdaomsck
tdaomdv
tdaomlrts
DAO_MCLK
DAO_SCLK
DAO_LRCLK
DAOn_DATAn
tdaomclk
tdaomsck
tdaomstlr
Note: In these diagrams, Falling edge is the inactive edge of DAO_SCLK
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