參數(shù)資料
型號: CS49DV8C-CVZR
廠商: Cirrus Logic Inc
文件頁數(shù): 6/30頁
文件大小: 0K
描述: IC DSP 32BIT DUAL AUDIO 128-LQFP
標準包裝: 750
系列: CS49DV8
類型: 定點
接口: I²C,SPI,UART
時鐘速率: 150MHz
非易失內存: ROM(576 kB)
芯片上RAM: 328kB
電壓 - 輸入/輸出: 3.30V
電壓 - 核心: 1.80V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 128-LQFP
供應商設備封裝: 128-LQFP(14x20)
包裝: 帶卷 (TR)
14
Copyright 2008 Cirrus Logic, Inc.
DS868PP2
CS49DV8C Data Sheet
32-bit Audio DSP Family
5.9 Switching Characteristics — Serial Control Port - SPI Slave Mode
.
Figure 3. Serial Control Port - SPI Slave Mode Timing
Parameter
Symbol
Min
Typical
Max
Units
SCP_CLK frequency1
1. The specification fspisck indicates the maximum speed of the hardware. The system designer should be aware that the
actual maximum speed of the communication port may be limited by the firmware application. Flow control using the
SCP_BSY pin should be implemented to prevent overflow of the input data buffer.At boot the maximum speed is
Fxtal/3.
fspisck
-25
MHz
SCP_CS falling to SCP_CLK rising
tspicss
24
-
ns
SCP_CLK low time
tspickl
20
-
ns
SCP_CLK high time
tspickh
20
-
ns
Setup time SCP_MOSI input
tspidsu
5-
ns
Hold time SCP_MOSI input
tspidh
5-
ns
SCP_CLK low to SCP_MISO output valid
tspidov
-11
ns
SCP_CLK falling to SCP_IRQ rising
tspiirqh
-20
ns
SCP_CS rising to SCP_IRQ falling
tspiirql
0ns
SCP_CLK low to SCP_CS rising
tspicsh
24
-
ns
SCP_CS rising to SCP_MISO output high-Z
tspicsdz
-20
ns
SCP_CLK rising to SCP_BSY falling
tspicbsyl
-3*DCLKP+20
ns
SCP_BSY
SCP_CS
SCP_CLK
SCP_MOSI
SCP_MISO
SCP_IRQ
0
1267
0
56
7
tspicss
tspickl
tspickh
tspidsu
tspidh
tspidov
A6
A5
A0
R/W
MSB
LSB
MSB
LSB
tspicsh
tspibsyl
tspiirql
tspiirqh
fspisck
tspicsdz
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