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參數(shù)資料
| 型號： | CS51024EDR16 |
| 廠商： | ZF Electronics Corporation |
| 英文描述： | Enhanced Current Mode PWM Controller |
| 中文描述： | 增強(qiáng)電流模式PWM控制器 |
| 文件頁數(shù)： | 4/9頁 |
| 文件大?。?/td> | 170K |
| 代理商： | CS51024EDR16 |
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
C
4
Electrical Characteristics: Unless otherwise stated, specifications apply for -40°C < T
A
< 85°C, -40°C < T
J
< 150°C,
3V < V
C
< 20V, 8.2V < V
CC
< 20V, R
T
= 12k
, C
T
= 390pF.
Package Pin Description
PACKAGE PIN #
PIN SYMBOL
FUNCTION
I
SLOPE Compensation
Charge Current
COMP Gain
SLOPE = 2V
Fraction of slope voltage added
to I
SENSE
(Note 1)
SYNC = 0V
-63
0.095
-53
0.100
-43
0.105
μA
V/V
Discharge Voltage
0.1
0.2
V
I
Current Sense
OFFSET Voltage
Blanking Time
Blanking Disable Voltage
Second Current Threshold Gain
I
SENSE
Input Resistance
Minimum On Time
Gain
(Note 1)
0.09
0.10
55
2
1.33
5
70
0.80
0.11
160
2.2
1.45
V
ns
V
Adjust V
FB
1.8
1.21
V/V
k
ns
V/V
GATE High to Low
(Note 1)
30
0.78
110
0.82
I
OV & UV Voltage Monitors
OV Monitor Threshold
OV Hysteresis Current
UV Monitor Threshold
UV Monitor Hysteresis
2.4
-10
1.38
25
2.5
-12.5
1.45
75
2.6
-15
1.52
100
V
μA
V
mV
I
SOFT START (SS)
Charge Current
Discharge Current
Charge Voltage, V
SS
Discharge Voltage, V
SS
SS = 2V
SS = 2V
-70
250
4.4
0.25
-55
1000
4.7
0.27
-40
μA
μA
V
V
5
0.30
Note 1: Guaranteed by Design, not 100% tested in production.
16L PDIP & SO Narrow
1
GATE
External power switch driver with 1.0A peak capability.
2
I
SENSE
Current sense amplifier input.
3
SYNC
(CS51021/23)
Bi-directional synchronization. Locks to the highest frequency.
3
SLEEP
(CS51022/24)
Active high chip disable. In sleep mode, V
REF
and GATE are
turned off.
4
SLOPE
Additional slope to the current sense signal. Internal current
source charges the external capacitor.
5
UV
Undervoltage protection monitor.
6
OV
Overvoltage protection monitor.
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