參數(shù)資料
型號： CS5124
廠商： ZF Electronics Corporation
英文描述： High Performance, Integrated Current Mode PWM Controllers
中文描述： 高性能，集成電流模式PWM控制器
文件頁數(shù)： 5/10頁
文件大?。?/td> 172K
代理商： CS5124
C
5
Block Diagram
G2
{2.90V
V5
REF
GATE
÷
V
FB
I
SENSE
V
CC
2.62 V/2.45V
1.91 V/1.83V
REMOTE
+
SS
V
CC
UVLO COMP
7.7 V/7.275V
+
-
LINE AMP
(CS5124 ONLY)
2.9 R
R
2.0V
+
+
-
SS COMP
275mV
V
V
V
V
1.32V
+
V
{275mV
{60mV
V
+
+
DRIVER
+
-
+
-
490mV
V
FB
COMP
PWM COMP
2ND I
COMP
+
-
+
LINE UVLO COMP
RESET DOMAIN
G6
4500
BIAS
UVLO
G1
V5
REF
F1
R
Q
S
G7
1000
BLANKING
10
μ
A
V5
REF
V5
REF
V
BLANK
V
CC
V
V
TSHUT
V
F2
R
Q
S
+
-
SS AMP
+
-
V
{85 mV/us}
170mV us
{1/5}
G5
OSC
RAMP
ENABLE
V
CC
V
REF
= 5V
G3
+
-
V
REFOK
SYNC
{CS5126 ONLY}
DIS
F3
R
Q
S
SET DOMAIN
SOFT START LATCH
150
°
C/125
°
C
+
Gnd
+
+
+
+
+
-
+
-
Theory of Operation
Powering the IC
V
CC
can be powered directly from a regulated supply
and requires 500μA of start-up current. The CS5124/6
includes a line bias pin (BIAS) that can be used to control a
series pass transistor for operation over a wide input volt-
age. The BIAS pin will control the gate voltage of an N-
channel MOSFET placed between V
IN
and V
CC
to regulate
V
CC
at 8V.
V
CC
and UVLO Pins
The UVLO pin has three different modes; low power shut-
down, Line UVLO, and normal operation. To illustrate
how the UVLO pin works; assume that V
IN
, as shown in
the application schematic, is ramped up starting at 0V with
the UVLO pin open. The SS and I
SENSE
pins also start at 0V.
While the UVLO is below 1.8V, the IC will remain in a low
current sleep mode and the BIAS pin of the CS5124 is inter-
nally clamped to a maximum of 15V. When the voltage on
the UVLO pin rises to between 1.8V and 2.6V the reference
for the V
CC
UVLO is enabled and V
CC
is regulated to 8V by
the BIAS pin (CS5124 only), but the IC remains in a UVLO
state and the output driver does not switch. When the
UVLO pin exceeds 2.6V and the V
CC
pin exceeds 7.7V, the
GATE pin is released from a low state and can begin
switching based on the comparison of the I
SENSE
and V
FB
pins. The Soft Start capacitor begins charging from 0V at
10μA. As the capacitor charges, a buffered version of the
capacitor voltage appears on the V
FB
pin and the V
FB
volt-
age begins to rise. As V
FB
rises the duty cycle increases
until the supply comes into regulation.
Soft Start
Soft Start is accomplished by clamping the V
FB
pin 1.32V
below the SS pin during normal start up and during restart
after a fault condition. When the CS5124/6 starts, the Soft
Start capacitor is charged from a 10μA source from 0V to
4.9V. The V
FB
pin follows the Soft Start pin offset by –1.32V
until the supply comes into regulation or until the Soft
Start error amp is clamped at 2.9V (2.65V for the CS5126).
During fault conditions the Soft Start capacitor is dis-
charged at 10mA.
Fault Conditions
The CS5124/6 recognizes the following faults: UVLO off,
Thermal Shutdown, V
REF(OK)
, and Second Current
Threshold. Once a fault is recognized, fault latch F2 is set
and the IC immediately shuts down the output driver and
discharges the Soft Start capacitor. Soft Start will begin
only after all faults have been removed and the Soft Start
capacitor has been discharged to less than 0.275V. Each
fault will be explained in the following sections.
相關(guān)PDF資料
PDF描述
CS5126XD8 High Performance, Integrated Current Mode PWM Controllers
CS5126 High Performance, Integrated Current Mode PWM Controllers
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CS5124XD8 High Performance, Integrated Current Mode PWM Controllers
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CS5124/6 制造商:未知廠家 制造商全稱:未知廠家 功能描述:High Performance Integrated Current Mode PWM Controllers
CS5124/D 制造商:未知廠家 制造商全稱:未知廠家 功能描述:High Performance， Integrated Current Mode PWM Controllers
CS5124D8 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Current-Mode SMPS Controller
CS5124DR8 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Current-Mode SMPS Controller
CS5124XD8 功能描述:電流型 PWM 控制器 Hi Performance RoHS:否 制造商:Texas Instruments 開關(guān)頻率:27 KHz 上升時間: 下降時間: 工作電源電壓:6 V to 15 V 工作電源電流:1.5 mA 輸出端數(shù)量:1 最大工作溫度:+ 105 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSSOP-14
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