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參數(shù)資料
| 型號： | CS51311 |
| 廠商： | ZF Electronics Corporation |
| 英文描述： | Synchronous CPU Buck Controller for 12V and 5V Applications |
| 中文描述： | 同步降壓控制器的CPU為12V和5V的應(yīng)用 |
| 文件頁數(shù)： | 6/19頁 |
| 文件大?。?/td> | 239K |
| 代理商： | CS51311 |
C
6
Reference
Voltage
+
C
–
E
+
–
Ramp Signal
Output
Feedback
V
FB
Error
Signal
GATE(H)
GATE(L)
Error
Amplifier
COMP
PWM
Comparator
Figure 6: V
2
TM
Control Diagram
Typical Performance Characteristics
150
125
100
75
50
25
0
0
2000
4000
6000
Load Capacitance (pF)
8000
10000
12000
14000
16000
F
V
CC
= 12V
T
A
= 25
°
C
0.10
0.05
0
0.05
0.10
0.15
0.20
1.325 1.375 1.425 1.475 1.525 1.575 1.625 1.675 1.725 1.775 1.825 1.875 1.925 1.975 2.025 2.075
DAC Output Voltage Setting (V)
O
V
CC
= 12V
T
A
= 25
°
C
V
ID4
= 0
Figure 4: Percent Output Error vs. DAC Output
Voltage Setting, V
ID4
= 0.
Figure 1: Gate(H) and Gate(L) Falltime vs. Load Capacitance.
Figure 2: Gate(H) and Gate(L) Risetime vs. Load Capacitance.
Figure 5: Percent Output Error vs. DAC Output
Voltage Setting, V
ID4
= 1.
150
125
100
75
50
25
0
0
2000
4000
6000
Load Capacitance (pF)
8000
10000
12000
14000
16000
R
V
CC
= 12V
T
A
= 25
°
C
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0
0.05
0.10
0.15
0.20
0.25
O
2.125 2.225 2.325 2.425 2.525 2.625 2.725 2.825 2.925 3.025 3.125 3.225 3.335 3.425 3.525
DAC Output Voltage Setting (V)
V
CC
= 12V
T
A
= 25
°
C
V
ID4
= 1
0.10
0.05
0
0.05
0.10
0.15
0
20
40
60
80
100
120
Junction Temperature (
°
C)
D
D
V
CC
= 12V
Figure 3: DAC Output Voltage vs. Temperature,
DAC Code = 00001.
Application Information
V
2
TM
Control Method
The V
2
TM
method of control uses a ramp signal that is gen-
erated by the ESR of the output capacitors. This ramp is
proportional to the AC current through the main inductor
and is offset by the value of the DC output voltage. This
control scheme inherently compensates for variation in
either line or load conditions, since the ramp signal is gen-
erated from the output voltage itself. This control scheme
differs from traditional techniques such as voltage mode,
which generates an artificial ramp, and current mode,
which generates a ramp from inductor current.
The V
2
TM
control method is illustrated in Figure 6. The out-
put voltage is used to generate both the error signal and
the ramp signal. Since the ramp signal is simply the output
Theory Of Operation
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
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