參數(shù)資料
型號(hào)： CS5525-ASZ
廠商： Cirrus Logic Inc
文件頁(yè)數(shù)： 10/30頁(yè)
文件大?。?/td> 0K
描述： IC ADC 16BIT W/4BIT LATCH 20SSOP
標(biāo)準(zhǔn)包裝： 66
位數(shù)： 16
數(shù)據(jù)接口： 串行
轉(zhuǎn)換器數(shù)目： 1
功率耗散（最大）： 12.7mW
電壓電源： 模擬和數(shù)字
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 20-SSOP（0.209"，5.30mm 寬）
供應(yīng)商設(shè)備封裝： 20-SSOP
包裝： 管件
輸入數(shù)目和類型： 1 個(gè)差分，單極；1 個(gè)差分，雙極
產(chǎn)品目錄頁(yè)面： 755 (CN2011-ZH PDF)
配用： 598-1013-ND - EVAL BOARD FOR CS5525
其它名稱： 598-1107-5
CS5525 CS5526
18
DS202F5
VREF- as shown in Figure 12. For any input range
other than the 2.5 V range, the modulator gain error
can not be completely calibrated out. This is due to
the lack of an accurate full scale voltage internal to
the chips. The 2.5 V range is an exception because
the external reference voltage is 2.5 V nominal and
is used as the full scale voltage. In addition, when
self-calibration of gain is performed in the 25 mV,
55 mV, and 100 mV input ranges, the instrumenta-
tion amplifier’s gain is not calibrated. These two
factors can leave the converters with a gain error of
up to ±20% after self-calibration of gain. There-
fore, a system gain is required to get better accura-
cy, except for the 2.5 V range.
System Calibration
For the system calibration functions, the user must
supply the converters calibration signals which rep-
resent ground and full scale. When a system offset
calibration is performed, a ground reference signal
must be applied to the converter. See Figures 13
and 14. As shown in Figures 15 and 16, the user
must input a signal representing the positive full
scale point to perform a system gain calibration. In
either case, the calibration signals must be within
the specified calibration limits for each specific
calibration step (refer to the System Calibration
Specifications).
AIN+
AIN-
OPEN
+
-
X20
+
-
OPEN
CLOSED
VREF+
CLOSED
VREF-
+
-
Reference
Figure 12. Self Calibration of Gain (All Ranges).
+
-
X20
+
-
External
Connections
0V
+
-
AIN+
AIN-
CM +
-
Figure 13. System Calibration of Offset (Low Ranges).
+
-
X20
+
-
External
Connections
+
-
AIN+
AIN-
CM +
-
0V
Figure 14. System Calibration of Offset (High Ranges).
+
-
X20
+
-
External
Connections
Full S cale +-
AIN+
AIN-
CM
+
-
Figure 15. System Calibration of Gain (Low Ranges)
+
-
X20
+
-
External
Connections
Full Scale
+
-
AIN+
AIN-
CM
+
-
Figure 16. System Calibration of Gain (High Ranges).
相關(guān)PDF資料
PDF描述
LT1715IMS#TR IC COMPARATOR 150MHZ DUAL 10MSOP
AD8612ARUZ-REEL IC COMP DUAL 4NS FAST 14-TSSOP
AD9609BCPZ-40 IC ADC 10BIT 40MSPS LP 32LFCSP
AD7276BUJZ-500RL7 IC ADC 12BIT 3MSPS TSOT23-6
LT1720IMS8#PBF IC COMPARATOR DUAL HS 3/5V 8MSOP
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CS5525-ASZR 功能描述:模數(shù)轉(zhuǎn)換器 - ADC IC 16Bit Delta Sigma Multi-Range ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
CS5525-BP 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:16 BIT / 20 BIT MULTI RANGE ADC WITH 4 BIT LATCH
CS5525-BS 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:16 BIT / 20 BIT MULTI RANGE ADC WITH 4 BIT LATCH
CS5526 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:16 BIT / 20 BIT MULTI RANGE ADC WITH 4 BIT LATCH
CS5526-000 制造商:TE Connectivity 功能描述:S200-1-01 - Bulk
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*