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參數(shù)資料
| 型號(hào)： | CXA1977R |
| 廠商： | Sony Corporation |
| 元件分類： | 外設(shè)及接口 |
| 英文描述： | Low Power 5V RS232 Dual Driver/Receiver with 0.1?μF Capacitors; Package: SO; No of Pins: 16; Temperature Range: -40?°C to 85?°C |
| 中文描述： | 電可擦除可編程邏輯器件 |
| 文件頁(yè)數(shù)： | 9/16頁(yè) |
| 文件大?。?/td> | 273K |
| 代理商： | CXA1977R |
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CXA1977R
Notes on Operation
1. Analog ground (AGND)
Keep analog ground surface on PCB as wide as possible with impedance and resistance as low as
possible.
2. Digital ground (DGND1, DGND2)
Upon mounting to PCB keep ground surface as wide as possible with impedance and resistance as low as
possible.
Moreover, a common analog and digital ground immediately near ADC will help obtain characteristics
smoothly.
3. Digital positive power supply (DVcc1, DVcc2, DVcc3)
Connect to the digital ground with a ceramic capacitor over 0.1μF and as close to the pins as possible.
Insert a ceramic capacitor between DVcc2 and DGND1 of TTL output power supply as shortly as possible
because noise tends to occur.
4. Analog positive power supply (AVcc)
Connect to the analog ground on PCB with a ceramic capacitor over 0.1μF as close to the pin as possible.
5. Reference voltage (VREFTS, VREFT, VREF1, VREF2, VREF3, VREFB, VREFBS)
These pins provide reference voltage to upper and lower comparators. Voltage between VREFT and
VREFB corresponds to input dynamic range.
There is a 200
resistance between VREFT and VREFB. By applying 2V to both pins a current of about
10mA flows. When the reference voltage is made unstable by the clock, ADC characteristics are adversely
affected. Connect VREFT and VREFB to the analog ground on PCB by means of a tantalum capacitor
over 10μF and a ceramic capacitor over 0.1μF respectively. Also, connect each of VREF1, VREF2 and
VREF3 to the analog ground on PCB using a ceramic capacitor over 0.1μF. This will provide stability to the
characteristics of high frequency. Strictly speaking on reference voltage VREFT side and VREFB side
there is a respective about 10mV offset.
When there is no problem with the usage of those offset voltages, voltage is applied directly to VREFT,
VREFB. In case the reference voltage is to be strictly applied, adjust to obtain an offset voltage of 0V,
keeping VREFTS and VREFBS as sense pins and VREFT and VREFB as force pins to form a feedback
loop circuit.
For details, see the Standard Circuit.
6. Analog input (VINH, VINL)
VINH is the input pin for the upper comparator while VINL is the input pin for the lower comparator.
Keep the input signal level within the level between VREFT and VREFB.
As this IC's analog input capacitance stands at about 50pF, it is necessary to drive with an buffer amplifier
having sufficient driving capability. Also, when driving is done with the buffer amplifier of a low output
impedance, as A/D converter input capacitance is large, ringing is generated and settling time grows
longer. Here a small resistance of about 5 to 30
is connected in series between the buffer amplifier and
each of A/D converter's VINH and VINL, as a dumping resistance. This eliminates ringing and shortens
settling time. Also keep wiring between buffer amplifier and A/D converter as short as possible.
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