參數(shù)資料
型號: CXD1196
廠商: Sony Corporation
英文描述: CD-ROM DECODER
中文描述: CD - ROM譯碼
文件頁數(shù): 24/28頁
文件大小: 278K
代理商: CXD1196
—24—
CXD1196AR
2.2.6
Header (HDR) Register
It is a 4-byte register indicating the Header byte of the current sector. The CPU can find the value of the
Header byte of the current sector from the Minute byte as it sets the REGADR register at X4 hex and
successively reads data.
2.2.7
Sub Header (SHDR) Register
It is a 4-byte register indicating the Sub Header byte of the current sector. The CPU can find the value of
the Sub Header byte of the current sector from the File byte as it sets the REGADR register at 08 hex and
successively reads data.
2.2.8
Current Minute Address L (CMADR-L) Register
2.2.9
Current Minute Address H (CMADR-H) Register
Indicates the buffer memory address where the Minute bytes of the current sector (after correction) is in
store.
2.2.10 MODE/FORM (MDFM) Register
Bit4-2
RMODE2-0
RMODE2 : Indicates the logic sum of the value of the high-order 6 bits of the raw MODE byte and the
pointer.
RMODE1, 0 : Respectively indicate the values of the low-order 2 bits of the raw MODE byte.
Bit1
CMODE (Correction Mode)
Bit0
CFORM (Correction Form)
These bits indicate which of the MODEs and FORMs this IC determined that the current sector was
associated with when it corrected errors.
2.2.11 ADPCI (ADPCM Coding Information) Register
Bit7
MUTE
This bit goes ‘H’ when the DA data is muted on.
Bit6
EMPHASIS
This bit goes ‘H’ when the ADPCM data is emphasized.
Bit5
EOR (End of Record)
This bit goes ‘H’ when the Sub Mode byte bit0 = ‘H’ and there is no error in the Sub Mode byte.
Bit4
BITLNGTH (Bit Length)
This bit indicates the bit length of ADPCM playback coding information.
‘H’
:
8 bits
‘L’
:
4 bits
Bit2
FS (Sampling Frequency)
This bit indicates the ADPCM playback sampling frequency.
‘H’
:
18.9 kHz
‘L’
:
37.8 kHz
Bit0
M/S (MONO/STEREO)
This bit indicates “monaural” or “stereo” of ADPCM playback coding information.
‘H’
:
Stereo
‘L’
:
Monaural
CFORM
‘X’
‘L’
‘H’
CMODE
‘L’
‘H’
‘H’
MODE1
MODE2, FORM1
MODE2, FORM2
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