參數(shù)資料
型號: CXD2442Q
廠商: Sony Corporation
英文描述: Timing Generator for LCD Panels
中文描述: 時序發(fā)生器的液晶面板
文件頁數(shù): 28/70頁
文件大小: 9533K
代理商: CXD2442Q
– 28 –
CXD2442Q
(I-5) VPOL, HPOL
These bits are the data for switching the input SYNC polarity. Sync separation processing is performed with
the SYNC polarity fixed to positive by the internal logic. Therefore, the polarity must be switched when the
input is positive or negative.
Accordingly, when the input SYNC is positive or negative, the VPOL and HPOL data should be set High or
Low, respectively.
(I-6) MODE
This bit switches the HCK, CLR, HST and PCG timing according to the mode. Operation shifts to LCX016
mode when MODE is High, and LCX012BL mode when MODE is Low. Be sure to set this data when using the
CXD2442Q in these modes.
(I-7) MODE3, 2, 1
These bits switch the panel display area. However, since the panel display area can only be switched for the
LCX016, VGA/NTSC mode should be set when using the LCX012BL.
When using the LCX016
MODE
1
2
3
Macintosh17 (832
×
624)
SVGA (800
×
600)
PAL (762
×
572)
VGA/NTSC (640
×
480)
PC-98 (640
×
400)
WIDE (832
×
480)
L
L
L
L
H
H
L
L
H
H
L
L
L
H
L
H
L
H
When using the LCX012BL
MODE
1
2
3
VGA/NTSC (640
×
480)
Also supports PAL display.
L
H
H
(I-4) FRP1, 0
These bits are the data for switching the LCD AC signal cycle. FRP1, 0 should normally be set to HH.
FRP1, 0: HH
(1H/1F inversion)
FRP1, 0: LH
(1H/2F inversion)
FRP1, 0: HL
(1F inversion)
FRP1, 0: LL
(2F inversion)
1F
1H
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CXD2443Q 制造商:SONY 制造商全稱:Sony Corporation 功能描述:Timing Generator for LCD Panels
CXD2450R 制造商:SONY 制造商全稱:Sony Corporation 功能描述:Timing Generator for Progressive Scan CCD Image Sensor
CXD2452R 制造商:SONY 制造商全稱:Sony Corporation 功能描述:Timing Generator for Progressive Scan CCD Image Sensor
CXD2453Q 制造商:SONY 制造商全稱:Sony Corporation 功能描述:Timing Generator for LCD Panels
CXD2457R 制造商:SONY 制造商全稱:Sony Corporation 功能描述:Timing Generator for Progressive Scan CCD Image Sensor