- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄378985 > CXD2585Q (Sony Corporation) CD Digital Signal Processor with Built-in Digital Servo PDF資料下載
參數(shù)資料
| 型號(hào)： | CXD2585Q |
| 廠商： | Sony Corporation |
| 元件分類： | 數(shù)字信號(hào)處理 |
| 英文描述： | CD Digital Signal Processor with Built-in Digital Servo |
| 中文描述： | CD數(shù)字信號(hào)處理器的內(nèi)置數(shù)碼舵機(jī) |
| 文件頁(yè)數(shù)： | 96/127頁(yè) |
| 文件大?。?/td> | 962K |
| 代理商： | CXD2585Q |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)當(dāng)前第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)
– 96 –
CXD2585Q
§ 5-15. Writing to Coefficient RAM
The coefficient RAM can be rewritten by $34. All coefficients have default values in the built-in ROM, and
transfer from the ROM to the RAM is completed approximately 40μs (when MCK = 128Fs) after the XRST pin
rises. (The coefficient RAM cannot be rewritten during this period.)
After that, the characteristics of each built-in filter can be finely adjusted by rewriting the data for each address
of the coefficient RAM.
The coefficient rewrite command is comprised of 24 bits, with D14 to D8 of $34 as the address (D15 = 0) and
D7 to D0 as data. Coefficient rewriting is completed 11.3μs (when MCK = 128Fs) after the command is
received. When rewriting multiple coefficients, be sure to wait 11.3μs (when MCK = 128Fs) before sending the
next rewrite command.
§ 5-16. PWM Output
FCS, TRK and SLD PWM format outputs are described below.
In particular, FCS and TRK use a double oversampling noise shaper.
Timing Chart 5-20 and Fig. 5-21 show examples of output waveforms and drive circuits.
t
MCK
= 1
≈
180ns
5.6448MHz
Timing Chart 5-20.
Fig. 5-21. Drive Circuit
64t
MCK
64t
MCK
64t
MCK
At
MCK
At
MCK
SFDR
SRDR
SLD
32t
MCK
32t
MCK
32t
MCK
32t
MCK
32t
MCK
32t
MCK
FCS/TRK
FFDR/
TFDR
FRDR/
TRDR
Output value +A
Output value –A
Output value 0
t
MCK
A
2
t
MCK
A
2
t
MCK
A
2
t
MCK
A
2
MCK
(5.6448MHz)
↑
↑
↑
↑
↑
↑
↑
R
R
R
R
V
EE
DRV
V
CC
RDR
FDR
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CXD2586R | CD Digital Signal Processor With Built-In Digital Servo and DAC(CD數(shù)字信號(hào)處理器（內(nèi)置數(shù)字伺服系統(tǒng)和D/A轉(zhuǎn)換器）) |
| CXD2586R-1 | CD Digital Signal Processor with Built-in Digital Servo and DAC |
| CXD2587 | RESISTOR,MIL-PRF-39007/9 |
| CXD2587Q | CD Digital Signal Processor with Built-in Digital Servo and DAC |
| CXD2588Q | RESISTOR,MIL-PRF-39007/9 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CXD2586R | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:CD Digital Signal Processor with Built-in Digital Servo and DAC |
| CXD2586R/-1 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:CD-Player Processor/Controller |
| CXD2586R-1 | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:CD Digital Signal Processor with Built-in Digital Servo and DAC |
| CXD2587 | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:CD Digital Signal Processor with Built-in Digital Servo and DAC |
| CXD2587Q | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:CD Digital Signal Processor with Built-in Digital Servo and DAC |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。