參數(shù)資料
型號： CXD3017Q
廠商： Sony Corporation
元件分類： 數(shù)字信號處理
英文描述： CD Digital Signal Processor with Built-in Digital Servo and DAC(CD數(shù)字信號處理器（內(nèi)置數(shù)字伺服系統(tǒng)和 D/A轉(zhuǎn)換器）)
中文描述： CD數(shù)字信號處理器，具有內(nèi)置數(shù)字伺服和DAC（光盤數(shù)字信號處理器（內(nèi)置數(shù)字伺服系統(tǒng)和的D / A轉(zhuǎn)換器））
文件頁數(shù)： 13/117頁
文件大小： 778K
代理商： CXD3017Q
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CXD3017Q
§1. CPU Interface
§1-1. CPU Interface Timing
CPU interface
This interface uses DATA, CLOK and XLAT to set the modes.
The interface timing chart is shown below.
The internal registers are initialized by a reset when XRST = 0.
Note)
Be sure to set SQCK to high when XLAT is low.
§1-2. CPU Interface Command Table
Total bit length for each register
Register
0 to 2
3
4 to 6
7
8
9
A
B
C
D
E
8 bits
8 to 24 bits
8 bits
20 bits
28 bits
24 bits
28 bits
16 bits
8 bits
16 bits
20 bits
Total bit length
750ns or more
D18
D19
D20
D21
D22
D23
750ns or more
Valid
CLOK
DATA
XLAT
Registers
D0
D1
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相關(guān)代理商/技術(shù)參數(shù)
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CXD3018Q/R 制造商:未知廠家 制造商全稱:未知廠家 功能描述:CD Digital Signal Processor with Built-in DigitalServo and DAC
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