參數資料
型號: CXD3152AR
廠商: Sony Corporation
英文描述: Signal Processor LSI for Single-chip CCD B/W Camera
中文描述: 信號處理LSI的單芯片防治荒漠化公約/黑白攝像機
文件頁數: 7/45頁
文件大小: 326K
代理商: CXD3152AR
– 7 –
CXD3152AR
Pin
No.
Symbol
I/O
Description
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
62
MCKPHS
V
SS
5
CVREF
COMP
V
SS
6
V
DD
6 (3.3V)
RREF
ANAB
ANA
REGRES
SDA
SCL
OEB
Y0
Y1
Y2
Y3
Y4
V
SS
7
Y5
Y6
Y7
MCKO
CHARA
2MCKI
V
DD
7
EIA
CCD
CSYNC_IN
SHD
I
P
O(A)
O(A)
P
P
O(A)
O(A)
O(A)
I
I/O
I/O
I
O
O
O
O
O
P
O
O
O
O
I
I
P
I
I
I
I
I
2MCKI input polarity switching
0: Through, 1: Inverted
Digital GND
DAC reference voltage output
Connect to GND via 0.1μF.
DAC phase compensation. Connect to GND via 0.1μF.
Digital GND
Digital power supply (3.3V)
DAC reference voltage generation
Normally connect to GND via 3.3k
.
DAC negative output. Normally connect to GND via 200
.
DAC positive output. Normally connect to GND via 200
.
Register reset. All registers reset to the default when low.
I
2
C bus data line
I
2
C bus clock line
Digital output (Y0 to Y7) control.
0: Output, 1: Hi-Z
Digital signal output (LSB)
Digital signal output
Digital signal output
Digital signal output
Digital signal output
Digital GND
Digital signal output
Digital signal output
Digital signal output (MSB)
Y0 to Y7 latch clock output
Character signal input
Reference clock input
Digital power supply (3.3V)
TV mode switching 0: EIA, 1: CCIR
CCD number of horizontal pixels switching
0: 510H system, 1: 760H system
Composite sync input
Backlight compensation window switching
00: Full-screen photometry, 01: Bottom photometry
10: Center photometry, 11: Bottom + center photometry
Data block sampling pulse input
60
61
I
BLCW1
BLCW2
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