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參數(shù)資料
| 型號(hào)： | CXK77P18L80AGB-4A |
| 元件分類： | SRAM |
| 英文描述： | 512K X 18 LATE-WRITE SRAM, 3.8 ns, PBGA119 |
| 封裝： | 14 X 22 MM, 1.27 MM PITCH, PLASTIC, BGA-119 |
| 文件頁(yè)數(shù)： | 23/25頁(yè) |
| 文件大小： | 269K |
| 代理商： | CXK77P18L80AGB-4A |
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SONY
CXK77P36L80AGB / CXK77P18L80AGB
Preliminary
8Mb LW R-L, rev 1.1
7 / 25
May 22, 2002
DC Recommended Operating Conditions
(VSS = 0V, TA = 0 to 85
oC)
1. The peak-to-peak AC component superimposed on VREF may not exceed 5% of the DC component.
2. VIH (max) AC = VDDQ + 0.75V for pulse widths less than one-quarter of the cycle time (tCYC/4).
3. VIL (min) AC = -0.75V for pulse widths less than one-quarter of the cycle time (tCYC/4).
Item
Symbol
Min
Typ
Max
Units
Notes
Supply Voltage
VDD
3.13
3.3
3.47
V
Output Supply Voltage
VDDQ
1.4
1.5
1.6
V
Input Reference Voltage
VREF
0.65
0.75
0.85
V
1
Input High Voltage (Address, Control, Data)
VIH
VREF + 0.1
---
VDDQ + 0.3
V
2
Input Low Voltage (Address, Control, Data)
VIL
-0.3
---
VREF - 0.1
V
3
Input High Voltage (M1, M2)
VMIH
1.3
---
VDD + 0.3
V
Input Low Voltage (M1, M2)
VMIL
-0.3
---
0.4
V
Clock Input Signal Voltage
VKIN
-0.3
---
VDDQ + 0.3
V
Clock Input Differential Voltage
VDIF
0.2
---
VDDQ + 0.6
V
Clock Input Common Mode Voltage
VCM
0.9
1.1
1.3
V
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