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參數(shù)資料
| 型號(hào)： | CY24212SC-3T |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | XO, clock |
| 英文描述： | MediaClock MPEG Clock Generator with VCXO |
| 中文描述： | 27.027 MHz, VIDEO CLOCK GENERATOR, PDSO8 |
| 封裝： | 0.150 INCH, MS-012, SOIC-8 |
| 文件頁(yè)數(shù)： | 3/6頁(yè) |
| 文件大?。?/td> | 111K |
| 代理商： | CY24212SC-3T |
CY24212
PRELIMINARY
Document #: 38-07402 Rev. *B
Page 3 of 6
DC Electrical Specifications
Parameter
I
OH
I
OL
C
IN
I
IH
I
IL
f
XO
V
VCXO
I
DD
V
IH
V
IL
R
UP
Name
Description
Min
12
12
Typ
24
24
Max
Unit
mA
mA
pF
μ
A
μ
A
ppm
V
mA
V
DD
V
DD
k
Output High Current
Output Low Current
Input Capacitance
Input High Current
Input Low Current
VCXO Pullability Range
VCXO Input Range
Supply Current
Input High Voltage
Input Low Voltage
Pull-up resistor on inputs
V
OH
= V
DD
–
0.5, V
DD
= 3.3V (source)
V
OL
= 0.5, V
DD
= 3.3V (sink)
7
V
IH
= V
DD
V
IL
= 0V
–
–
5
–
10
50
+150
0
V
DD
35
Sum of Core and Output Current
CMOS levels, 70% of V
DD
CMOS levels, 30% of V
DD
V
DD
= 3.14 to 3.47V, measured V
IN
= 0V
0.7
0.3
150
100
AC Electrical Specifications (V
DD
= 3.3V)
Parameter
[3]
Name
DC
Output Duty Cycle
ER
Rising Edge Rate
Description
Min
45
0.8
Typ
50
1.4
Max
55
Unit
%
V/ns
Duty Cycle is defined in
Figure 1
, 50% of V
DD
Output Clock Edge Rate, Measured from 20%
to 80% of V
DD
, C
LOAD
= 15 pF. See
Figure 2
.
Output Clock Edge Rate, Measured from 80%
to 20% of V
DD
, C
LOAD
= 15 pF. See
Figure 2
.
Peak-to-peak period jitter
EF
Falling Edge Rate
0.8
1.4
V/ns
t
9
t
10
Clock Jitter
PLL Lock Time
300
ps
ms
3
Test and Measurement Set-up
Note:
3.
Not 100% tested.
0.1
μ
F
V
DDs
Outputs
C
LOAD
GND
DUT
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CY24212 | MediaClock MPEG Clock Generator with VCXO |
| CY24212-1 | MediaClock MPEG Clock Generator with VCXO |
| CY24212-2 | MediaClock MPEG Clock Generator with VCXO |
| CY24212-3 | MediaClock MPEG Clock Generator with VCXO |
| CY24212-5 | MediaClock MPEG Clock Generator with VCXO |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY24212SC-5 | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Cypress Semiconductor 功能描述: |
| CY24212SC-5T | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:MediaClock⑩ MPEG Clock Generator with VCXO |
| CY24212SXC-5 | 功能描述:鎖相環(huán) - PLL MediaClock Clock COM RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| CY24212SXC-5T | 功能描述:鎖相環(huán) - PLL MediaClock Clock COM RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| CY24212SZC-5 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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