參數(shù)資料
型號： CY38030V256-66BBI
廠商： CYPRESS SEMICONDUCTOR CORP
元件分類： PLD
英文描述： LOADABLE PLD, 18.9 ns, PBGA256
封裝： 17 X 17 MM, 1.60 MM HEIGHT, TFBGA-256
文件頁數(shù)： 4/32頁
文件大?。?/td> 929K
代理商： CY38030V256-66BBI
PRELIMINARY
Quantum38K ISR
CPLD Family
Document #: 38-03043 Rev. **
Page 12 of 32
Maximum Ratings
(Above which the useful life may be impaired. For user guide-
lines, not tested.)
Storage Temperature .................................. –65
°C to +150°C
Soldering Temperature...................................................220
°C
Ambient Temperature with
Power Applied............................................... –40
°C to +85°C
Junction Temperature....................................................135
°C
VCC to Ground Potential...................................–0.5V to 4.6V
VCCIO to Ground Potential................................–0.5V to 4.6V
DC Voltage Applied to Outputs in High Z State –0.5V to 4.5V
DC Input voltage......................... ......................–0.5V to 4.5V
DC Current into Outputs............................................±20 mA
Static Discharge Voltage (per MIL-STD-8883,
Method 3015)....................... ......................................>2001V
Latch-Up Current.......................................................>200 mA
Note:
4.
Not more than one output should be tested at a time. Duration of the short circuit should not exceed 1 second. VOUT=0.5V has been chosen to avoid test problems
caused by tester ground degradation. Tested initially and after any design or process changes that may affect this parameter.
Operating Range
Range
Ambient
Temperature
Junction
Temperature
Output Con-
dition
VCCIO
VCC
VCCJTAG/
VCCCNFG
Commercial
0
°C to +70°C
0
°C to +85°C
3.3V
3.3V ± 0.3V
3.3V ± 0.3V or
2.5V ± 0.2V
Same as
VCCIO
2.5V
2.5V ± 0.2V
1.8V
1.8 ± 0.15V
Industrial
–40
°C to +85°C
–40
°C to +100°C
3.3V
3.3V ± 0.3V
2.5V
2.5V ± 0.2V
1.8V
1.8 ± 0.15V
DC Characteristics
Parameter
Description
Test Conditions
VCCIO = 3.3 V
VCCIO = 2.5 V
VCCIO = 1.8 V
Unit
Min.
Max.
Min.
Max.
Min.
Max.
VDRINT
Data Retention VCC Voltage
(config data may be lost below
this)
1.5
V
VDRIO
Data Retention VCCIO Voltage
(config data may be lost below
this)
1.2
V
IIX
Input Leakage Current
GND
≤ V
I ≤ 3.6V
–10
10
–10
10
–10
10
A
IOZ
Output Leakage Current
GND
≤ V
O ≤ VCCIO
–10
10
–10
10
–10
10
A
IOS
Output Short Circuit Current
VCCIO = Max.,
VOUT = 0.5V
–160
mA
IBHL
Input Bus Hold LOW Sustain-
ing Current
VCC = Min., VPIN = VIL
+40
+30
+25
A
IBHH
Input Bus Hold HIGH Sustain-
ing Current
VCC = Min., VPIN = VIH
–40
–30
–25
A
IBHLO
Input Bus Hold LOW Overdrive
Current
VCC = Max.
+250
+200
+150
A
IBHHO
Input Bus Hold HIGH Overdrive
Current
VCC = Max.
–250
–200
–150
A
相關(guān)PDF資料
PDF描述
CY38050V208-83NC LOADABLE PLD, 15 ns, PQFP208
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CY38050V208-125NC LOADABLE PLD, 10 ns, PQFP208
CY38050V208-125NI LOADABLE PLD, 10 ns, PQFP208
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CY38050V208-125NTC 制造商:Cypress Semiconductor 功能描述:CPLD QUANTUM38K 72K GATES 768 MCRCLLS COMM 0.18UM 2.5V/3.3V - Bulk
CY38050V208-125NTI 制造商:Cypress Semiconductor 功能描述:CPLD QUANTUM38K 72K GATES 768 MCRCLLS IND 0.18UM 2.5V/3.3V 2 - Bulk
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CY38050V208-83NTI 制造商:Cypress Semiconductor 功能描述:CPLD QUANTUM38K 72K GATES 768 MCRCLLS IND 0.18UM 2.5V/3.3V 2 - Bulk
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