參數(shù)資料
型號(hào)： CY39200Z208-167NC
廠商： CYPRESS SEMICONDUCTOR CORP
元件分類： PLD
英文描述： LOADABLE PLD, 8.5 ns, PQFP208
封裝： PLASTIC, QFP-208
文件頁(yè)數(shù)： 13/57頁(yè)
文件大?。?/td> 1166K
代理商： CY39200Z208-167NC
PRELIMINARY
Delta39K ISR
CPLD Family
Document #: 38-03039 Rev. **
Page 20 of 57
Miscellaneous Delays
tCPLD
Delay from the input of a cluster PIM, through a macrocell in the cluster, back to a cluster PIM input. This
parameter can be added to the tPD and tSCS parameters for each extra pass through the AND/OR array
required by a given signal path
tMCCD
Adder for carry chain logic per macrocell
tIOD
Delay from the input of the output buffer to the I/O pin
tIOIN
Delay from the I/O pin to the input of the channel buffer
tCKIN
Delay from the clock pin to the input of the clock driver
tIOREGPIN
Delay from the I/O pin to the input of the I/O register
PLL Parameters
tMCCJ
Maximum cycle to cycle jitter time
tDWSA
PLL delay with skew adjustment
tDWOSA
PLL delay without any skew adjustment
tLOCK
Lock time for the PLL
fPLLO
Output frequency of the PLL
fPLLI
Input frequency of the PLL
JTAG Parameters
tJCKH
TCLK HIGH time
tJCKL
TCLK LOW time
tJCP
TCLK clock period
tJSU
JTAG port setup time (TDI/TMS inputs)
tJH
JTAG port hold time (TDI/TMS inputs)
tJCO
JTAG port clock to output time (TDO)
tJXZ
JTAG port valid output to high impedance (TDO)
tJZX
JTAG port high impedance to valid output (TDO)
Switching Characteristics - Parameter Descriptions Over the Operating Range [12] (continued)
Parameter
Description
相關(guān)PDF資料
PDF描述
CY39200Z388-167MGC LOADABLE PLD, 8.5 ns, PBGA388
CY39200Z484-167BBC LOADABLE PLD, 8.5 ns, PBGA484
CY39200Z676-167MBC LOADABLE PLD, 8.5 ns, PBGA676
CY39100V388B-125MGXC LOADABLE PLD, 10 ns, PBGA388
CY39100V388B-83MGXC LOADABLE PLD, 15 ns, PBGA388
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CY39200Z208-181BBC 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:CPLDs at FPGA Densities
CY39200Z208-181BBI 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:CPLDs at FPGA Densities
CY39200Z208-181BGC 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:CPLDs at FPGA Densities
CY39200Z208-181BGI 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:CPLDs at FPGA Densities
CY39200Z208-181MBC 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:CPLDs at FPGA Densities
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