參數(shù)資料
型號: CY7C008V
英文描述: Memory
中文描述: 內(nèi)存
文件頁數(shù): 17/20頁
文件大?。?/td> 301K
代理商: CY7C008V
CY7C138AV/144AV/006AV
CY7C139AV/145AV/016AV
CY7C007AV/017AV
Document #: 38-06051 Rev. *A
Page 6 of 20
Notes:
13. fMAX = 1/tRC. All inputs cycling at f = 1/tRC (except output enable). f = 0 means no address or control lines change. This applies only to inputs at CMOS level standby ISB3.
14. Tested initially and after any design or process changes that may affect these parameters.
Electrical Characteristics Over the Operating Range
Parameter
Description
CY7C138AV/144AV/006AV
CY7C139AV/145AV/016AV
CY7C007AV/017AV
-20
-25
Unit
Min.
Typ.
Max.
Min.
Typ.
Max.
VOH
Output HIGH Voltage (VCC = 3.3V)
2.4
V
VOL
Output LOW Voltage
0.4
V
VIH
Input HIGH Voltage
2.0
V
VIL
Input LOW Voltage
0.8
V
IOZ
Output Leakage Current
–10
10
–10
10
A
ICC
Operating Current (VCC = Max.,
IOUT = 0 mA) Outputs Disabled
Com’l.
120
175
115
165
mA
Ind.[12]
140
195
mA
ISB1
Standby Current (Both Ports TTL Level)
CEL & CER ≥ VIH, f = fMAX
[13]
Com’l.
35
45
30
40
mA
Ind.[12]
45
55
mA
ISB2
Standby Current (One Port TTL Level)
CEL | CER ≥ VIH, f = fMAX
[13]
Com’l.
75
110
65
95
mA
Ind.[12]
85
130
mA
ISB3
Standby Current (Both Ports CMOS Level)
CEL & CER ≥ VCC – 0.2V, f = 0
[13]
Com’l.
10
500
10
500
A
Ind.[12]
10
500
A
ISB4
Standby Current (One Port CMOS Level)
CEL | CER ≥ VIH, f = fMAX
[13]
Com’l.
70
95
60
80
mA
Ind.[12]
80
105
mA
Capacitance[14]
Parameter
Description
Test Conditions
Max.
Unit
CIN
Input Capacitance
TA = 25°C, f = 1 MHz,
VCC = 3.3V
10
pF
COUT
Output Capacitance
10
pF
AC Test Loads and Waveforms
3.0V
GND
90%
10%
3ns
3 ns
10%
ALL INPUT PULSES
(a) Normal Load (Load 1)
R1 = 590
3.3V
OUTPUT
R2 = 435
C= 30 pF
VTH =1.4V
OUTPUT
C
= 30 pF
(b) ThéveninEquivalent (Load 1)
(c) Three-State Delay (Load 2)
R1 = 590
R2 = 435
3.3V
OUTPUT
C= 5pF
RTH = 250
including scope and jig)
(Used for tLZ, tHZ, tHZWE & tLZWE
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