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參數(shù)資料
| 型號： | CY7C0851AV-133AXI |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | SRAM |
| 英文描述： | FLEx36™ 3.3V 32K/64K/128K/256K x 36 Synchronous Dual-Port RAM |
| 中文描述： | 64K X 36 DUAL-PORT SRAM, 4 ns, PQFP176 |
| 封裝： | 24 X 24 MM, 1.40 MM HEIGHT, LEAD FREE, TQFP-176 |
| 文件頁數(shù)： | 13/36頁 |
| 文件大?。?/td> | 956K |
| 代理商： | CY7C0851AV-133AXI |
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CY7C0850AV,CY7C0851V/CY7C0851AV
CY7C0852V/CY7C0852AV
CY7C0853V/CY7C0853AV
Document #: 38-06070 Rev. *J
Page 20 of 36
Figure 12. Read-to-Write-to-Read (OE Controlled)[37, 38, 39, 40]
Figure 13. Read with Address Counter Advance[39]
Switching Waveforms (continued)
tCYC2
tCL2
tCH2
tHC
tSC
tHW
tSW
tHA
tSA
An
An+1
An+2
An+3
An+4
An+5
tHW
tSW
tSD tHD
Dn+2
tCD2
tOHZ
READ
WRITE
Dn+3
Qn
CLK
CE
R/W
ADDRESS
DATAIN
DATAOUT
OE
Qn+4
tCD2
Qn+1
tCD2
tSA
tHA
tCH2
tCL2
tCYC2
CLK
ADDRESS
An
COUNTER HOLD
READ WITH COUNTER
tSAD
tHAD
tSCN
tHCN
tSAD
tHAD
tSCN
tHCN
Qx–1
Qx
Qn
Qn+1
Qn+2
Qn+3
tDC
tCD2
READ WITH COUNTER
READ
EXTERNAL
ADDRESS
ADS
CNTEN
DATAOUT
Notes
37. Addresses do not have to be accessed sequentially since ADS = CNTEN = VIL with CNT/MSK = VIH constantly loads the address on the rising edge of the CLK.
Numbers are for reference only
38. Output state (HIGH, LOW, or high-impedance) is determined by the previous cycle control signals.
39. CE0 = OE = B0 – B3 = LOW; CE1 = R/W = CNTRST = MRST = HIGH.
40. CE0 = B0 – B3 = R/W = LOW; CE1 = CNTRST = MRST = CNT/MSK = HIGH. When R/W first switches low, since OE = LOW, the Write operation cannot be completed
(labelled as no operation). One clock cycle is required to three-state the I/O for the Write operation on the next rising edge of CLK.
相關(guān)PDF資料 |
PDF描述 |
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| CY7C0851AV-133BBI | FLEx36™ 3.3V 32K/64K/128K/256K x 36 Synchronous Dual-Port RAM |
| CY7C0851AV-167BBXC | FLEx36™ 3.3V 32K/64K/128K/256K x 36 Synchronous Dual-Port RAM |
| CY7C0852AV-133AXC | FLEx36™ 3.3V 32K/64K/128K/256K x 36 Synchronous Dual-Port RAM |
| CY7C0852AV-133AXI | FLEx36™ 3.3V 32K/64K/128K/256K x 36 Synchronous Dual-Port RAM |
| CY7C0852AV-133BBI | FLEx36™ 3.3V 32K/64K/128K/256K x 36 Synchronous Dual-Port RAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C0851AV-133BBC | 制造商:Cypress Semiconductor 功能描述: 制造商:Cypress Semiconductor 功能描述:SRAM SYNC DUAL 3.3V 2.25MBIT 64KX36 4.7NS 172FBGA - Trays 制造商:Rochester Electronics LLC 功能描述: |
| CY7C0851AV-133BBI | 功能描述:靜態(tài)隨機(jī)存取存儲器 2MB (64Kx36) 3.3v 133MHz Synch 靜態(tài)隨機(jī)存取存儲器 RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| CY7C0851AV-167AC | 制造商:Cypress Semiconductor 功能描述:SRAM SYNC DUAL 3.3V 2.25MBIT 64KX36 4NS 176TQFP - Trays |
| CY7C0851AV-167AXC | 功能描述:靜態(tài)隨機(jī)存取存儲器 3.3V, 64Kx36 Sync Dual Port RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| CY7C0851AV-167BBC | 制造商:Cypress Semiconductor 功能描述:SRAM SYNC DUAL 3.3V 2.25MBIT 64KX36 4NS 172FBGA - Trays 制造商:Rochester Electronics LLC 功能描述: |
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